US5474948A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making semiconductor device having polysilicon resistance element
Assignee: Micron Memory Japan Ltd
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Filing: 1992-12-18
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Granted: 1995-12-12
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Expires: 2012-12-18
Abstract
Abstract A polysilicon resistor element and a semiconductor device using the same are disclosed. The polysilicon resistor element has a resistive polysilicon film formed on a predetermined interlayer insulating film of a semiconductor chip. The resistive polysilicon film is covered by an insulating film having holes and high melting point metal films are formed in self-alignment to the holes. The high melting metal film constitutes one of lead portions of the polysilicon resistor element. A diffusion of the high melting point metal film due to heat treatment during fabrication, which causes an effective length of the resistor element, becomes negligible and reproducibility is improved.
Inventors
- 👤 Yasushi Yamazaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 14:41
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47; H10B; H10B10/00; H10B10/15; Y; Y10; Y10S; Y10S148/00; Y10S148/136; Y10S257/00; Y10S257/903; Y10S257/904
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
270 words
A method of fabricating a polysilicon film resistor element comprising the steps of: forming a first insulating film on a semiconductor substrate, said first insulating film having a plurality of field isolation portions, each of said field isolation portions being partially embedded into said semiconductor substrate in order to divide a surface portion of said semiconductor substrate into first, second and third active regions, said second active region intervening between said first and third active regions; forming first and second element regions into said first and second active regions, respectively; selectively forming a resistive polysilicon film on said first insulating film, said resistive polysilicon film being doped with an impurity to provide a polysilicon film resistor element having a first end portion which is electrically connected to said first element region, a second end portion of said resistive polysilicon film being located over and isolated from said third active region by said first insulating film, an intermediate portion of said resistive polysilicon film which is between said first and second end portions being located over said second element region in said second active region, said intermediate portion being isolated from said second active region by said first insulating film, said second end portion of said resistive polysilicon film having a surface part; forming a second insulating film to cover said resistive polysilicon film; forming a contact hole to expose said surface part of said second end portion of said resistive polysilicon film; and forming a metal with a high melting point on said surface part of said second end portion of said resistive polysilicon film exposed by said contact hole.
Claim 2
Independent Claim
270 words
A method of fabricating a polysilicon film resistor element comprising the steps of: forming a first insulating film on a semiconductor substrate, said first insulating film having a plurality of field isolation portions, each of said field isolation portions being partially embedded into said semiconductor substrate in order to divide a surface portion of said semiconductor substrate into first, second and third active regions, said second active region intervening between said first and third active regions; forming first and second element regions into said first and second active regions, respectively; selectively forming a resistive polysilicon film on said first insulating film, said resistive polysilicon film being doped with an impurity to provide a polysilicon film resistor element having a first end portion which is electrically connected to said first element region, a second end portion of said resistive polysilicon film being located over and isolated from said third active region by said first insulating film, an intermediate portion of said resistive polysilicon film which is between said first and second end portions being located over said second element region in said second active region, said intermediate portion being isolated from said second active region by said first insulating film, said second end portion of said resistive polysilicon film having a surface part; forming a second insulating film to cover said resistive polysilicon film; forming a contact hole to expose said surface part of said second end portion of said resistive polysilicon film; and forming a metal with a high melting point on said surface part of said second end portion of said resistive polysilicon film exposed by said contact hole.
Claim 3
Dependent Claim
133 words
The method as claimed in claim 1, wherein said first insulating film has a gate insulating film formed on a part of said second active region and said method further comprises the step of forming a gate polysilicon film on said gate insulating film, said gate polysilicon film forming a gate of a field effect transistor and being in an elongated position over said first active region to be in contact with said first element region, said second element region being formed by using said gate polysilicon film as a mask to form one of a source region and a drain region of said field effect transistor, and said first end portion of said resistive polysilicon film being in contact with said gate polysilicon film and electrically connected to said first element region.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-12-11 | 1999-06-12 | 1999-12-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-12-11 | 2003-06-12 | 2003-12-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-12-11 | 2007-06-12 | 2007-12-12 | $7700.00 | Window Closed / Lapsed |