Circuit for generating a process variation insensitive reference bias current

Claim 1

A reference bias current generation circuit, comprising: a first bipolar transistor having a collector coupled to a first supply voltage, a base terminal and an emitter terminal; a second bipolar transistor having a collector coupled to said first supply voltage, a base terminal coupled to said base terminal of said first bipolar transistor and an emitter terminal; a first MOS transistor having a drain terminal coupled to said emitter terminal of said first bipolar transistor, a gate terminal and a source terminal; an operational amplifier having a first input terminal coupled to said emitter terminal of said second bipolar transistor and a second input terminal coupled to said source terminal of said first MOS transistor, said operational amplifier providing an output signal having a magnitude indicative of the difference between the voltages at said first and second input terminals; a first current source coupled between said source terminal of said first MOS transistor and a second supply voltage, said first current source receiving and responsive to said output signal of said operational amplifier; a second current source coupled to said emitter terminal of said second bipolar transistor and said second supply voltage; and means, coupled to the base terminal of the first bipolar transistor and the gate terminal of the first MOS transistor, for compensating the current through said first MOS transistor variations due to a shift in the threshold voltage of said first MOS transistor.