Abstract The invention provides a method of forming a gate electrode on a channel layer in a field effect transistor. A first layer made of a first metal having a heat resistivity is formed on a gate formation region of a surface of a channel layer on a semiconductor substrate. The substrate is subjected to a heat treatment so as to recover a damage of the channel layer caused by the formation of the first layer. A second layer made of a second metal having a heat resistivity is formed on a surface of the first layer. A third layer made of a third metal having a low electrical resistivity is formed on a surface of the second layer thereby a gate electrode comprising the first, second and third layers is formed on the channel layer free from any damage caused by the formation steps.
A method of forming a gate electrode on a channel layer in a field effect transistor comprising the steps of: carrying out an electron beam evaporation method to deposit a heat resistive metal layer on an epitaxial layer formed on a semiconductor substrate whereby said epitaxial layer receives a damage; subjecting said epitaxial layer to a heat treatment at a temperature in the range of from 300° C. to 550° C. so as to recover said damage of said epitaxial layer and also to improve the adhesion between sid heat resistive metal layer and said epitaxial layer; depositing a tungten silicide (W 5 Si 3 ) layer by sputtering on said heat resistive metal layer; and depositing a Ti-Pt-Au multi-layer on said tungsten silicide layer, said multi-layer serving as a gate electrode.
Claim 2
Independent Claim
132 words
A method of forming a gate electrode on a channel layer in a field effect transistor comprising the steps of: carrying out an electron beam evaporation method to deposit a heat resistive metal layer on an epitaxial layer formed on a semiconductor substrate whereby said epitaxial layer receives a damage; subjecting said epitaxial layer to a heat treatment at a temperature in the range of from 300° C. to 550° C. so as to recover said damage of said epitaxial layer and also to improve the adhesion between sid heat resistive metal layer and said epitaxial layer; depositing a tungten silicide (W 5 Si 3 ) layer by sputtering on said heat resistive metal layer; and depositing a Ti-Pt-Au multi-layer on said tungsten silicide layer, said multi-layer serving as a gate electrode.
Claim 3
Dependent Claim
33 words
The method as claimed in claim 1, wherein said heat treatment is carried out in an atmosphere including at least AsH 3 to keep stoichiometries of said epitaxial layer and said semiconductor substrate.
Claim 4
Dependent Claim
41 words
The method as claimed in claim 1, wherein said heat treatment is carried out in an atmosphere comprising N 2 , H 2 and Ar after a chemical vapor deposition of a silicon oxide film on said heat resistive metal layer.
Claim 5
Dependent Claim
17 words
The method as claimed in claim 1, wherein said heat resistive metal layer is made of tungsten.
Claim 6
Dependent Claim
25 words
The method as claimed in claim 1, wherein said heat resistive metal layer has a thickness in the range of from 150 to 200 nanometers.
Claim 7
Dependent Claim
15 words
The method as claimed in claim 1, wherein said semiconductor substrate comprises a GaAs substrate.
Claim 8
Dependent Claim
15 words
The method as claimed in claim 1, wherein said Ti-Pt-Au multi-layer is deposited by sputtering.
Claim 9
Dependent Claim
17 words
The method as claimed in claim 1, wherein said Ti-Pt-Au multi-layer is deposited by electron beam evaporation.
Claim 10
Dependent Claim
18 words
The method as claimed in claim 1, wherein said heat treatment is continued for 5 to 60 minutes.