Semiconductor integrated circuit device

Abstract

Abstract PURPOSE:To eliminate the sublining property of the titled device and to contrive to improve the heat resistance thereof by a method wherein the wiring layer is formed into a laminated structure of a high-melting point metal layer and molybdenum silicide layers, each having a film thickness of 200nm or less. CONSTITUTION:The wiring layer consisting of wiring layers 106, 107 and 108 is formed into a laminated structure of a high-melting point layer 107 and high-melting point metal silicide layers 106 and 108 and the said high-melting point metal silicide layers are specially molybdenum silicide layers, each having a film thickness of 220nm or less. The molybdenum silicide layer 6 is connected to the silicon substrate through an impurity diffusion layer 103 in the connecting part 105 of the wiring layer with the impurity diffusion layer 103. The molybdenum silicide layer 106 has a barrier property against the thermal reaction of the molybdenum layer 107 to the silicon substrate. Moreover, the molybdenum silicide layer 8 suppresses the sublimation of the molybdenum layer 107 in an oxidizing atmosphere at the time of formation of an interlayer insulating layer 109. Furthermore, the resistivity of the wiring layer shows a value equal to the resistivity of the molybdenum layer 107 in case the layer 107 is a single layer.

Inventors

• 👤 Shigeru Murakami
• 👤 茂 村上

Bibliographic Details