US5444020A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for forming contact holes having different depths
Assignee: Samsung Electronics Co Ltd
•
Filing: 1993-10-13
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Granted: 1995-08-22
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Expires: 2013-10-13
Abstract
Abstract A method for forming contact holes having different depths in an insulating layer which covers a semiconductor substrate. A first step selectively etches the upper parts of the insulating layer which correspond to contact holes having a greater depth than the shallowest contact hole, using a first mask pattern. A second etch step selectively etches the remainder of the insulating layer for all of the contact holes at the same time using a second mask pattern. Thus, contact hole misalignment is kept to a minimum.
Inventors
- 👤 Seung-ku Lee
- 👤 Kyung-seok Oh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 17:56
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/089; H10W20/082; H10W20/031; H10W20/069; H10W20/084; Y; Y10; Y10S; Y10S148/00; Y10S148/051
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
84 words
A method for forming a plurality of contact holes having different depths in an insulating layer that covers a semiconductor substructure comprising the steps of: partially etching a first etch region in an upper portion of said insulating layer using a first mask pattern; and simultaneously etching said etched first etch region and a second etch region spaced away from said etched first etch region using a second mask pattern to thereby form first and second contact holes respectively which expose said semiconductor substructure.
Claim 2
Independent Claim
84 words
A method for forming a plurality of contact holes having different depths in an insulating layer that covers a semiconductor substructure comprising the steps of: partially etching a first etch region in an upper portion of said insulating layer using a first mask pattern; and simultaneously etching said etched first etch region and a second etch region spaced away from said etched first etch region using a second mask pattern to thereby form first and second contact holes respectively which expose said semiconductor substructure.
Claim 3
Dependent Claim
26 words
The method for forming contact holes according to claim 1, wherein said step of etching said first etch region is performed in vertical and lateral directions.
Claim 4
Dependent Claim
25 words
The method for forming contact holes according to claim 1, wherein said first mask pattern and said second mask pattern include a photoresist mask film.
Claim 5
Dependent Claim
27 words
The method for forming contact holes according to claim 1, wherein said step of etching said first and second etch regions is performed in a vertical direction.
Claim 6
Dependent Claim
27 words
The method for forming contact holes according to claim 2, wherein said step of etching said first and second etch regions is performed in a vertical direction.
Claim 7
Dependent Claim
54 words
The method for forming contact holes according to claim 1, wherein said step of partially etching said first etch region etches said insulating layer so that a depth of said insulating layer at said first etch region corresponds to a depth of said semiconductor substructure within said insulating layer at said second etch region.
Claim 8
Dependent Claim
54 words
The method for forming contact holes according to claim 5, wherein said step of partially etching said first etch region etches said insulating layer so that a depth of said insulating layer at said first etch region corresponds to a depth of said semiconductor substructure within said insulating layer at said second etch region.
Claim 9
Independent Claim
104 words
A method for interconnecting conducting layers to a conductive semiconductor substructure through contact holes having different depths in an insulating layer, comprising the steps of: partially etching a first etch region in an upper portion of said insulating layer using a first mask pattern; etching said etched first etch region and a second etch region spaced away from said first etch region using a second mask pattern to form first and second contact holes, respectively, which expose respective portions of said semiconductor substructure; and forming said conductive layers which contact said respective portions of said semiconductor substructure through said first and second contact holes.
Claim 10
Independent Claim
104 words
A method for interconnecting conducting layers to a conductive semiconductor substructure through contact holes having different depths in an insulating layer, comprising the steps of: partially etching a first etch region in an upper portion of said insulating layer using a first mask pattern; etching said etched first etch region and a second etch region spaced away from said first etch region using a second mask pattern to form first and second contact holes, respectively, which expose respective portions of said semiconductor substructure; and forming said conductive layers which contact said respective portions of said semiconductor substructure through said first and second contact holes.
Claim 11
Dependent Claim
17 words
A method for interconnecting conducting layers according to claim 8, wherein said conductive layers are metal layers.
Claim 12
Dependent Claim
26 words
A method for interconnecting conducting layers according to claim 8, wherein said step of etching said first etch region is performed in vertical and lateral directions.
Claim 13
Dependent Claim
26 words
A method for interconnecting conducting layers according to claim 8, wherein said first mask pattern and said second mask pattern each include a photoresist mask film.
Claim 14
Dependent Claim
27 words
A method for interconnecting conducting layers according to claim 8, wherein said step of etching said first and second contact holes is performed in a vertical direction.
Claim 15
Dependent Claim
27 words
A method for interconnecting conducting layers according to claim 10, wherein said step of etching said first and second contact holes is performed in a vertical direction.
Claim 16
Dependent Claim
52 words
A method for interconnecting conducting layers according to claim 8, wherein said step of etching said first etch region etches said insulating layer so a depth of said insulating layer at said first etch region corresponds to a depth of said semiconductor substructure within said insulating layer at said second etch region.
Claim 17
Dependent Claim
51 words
A method for interconnecting conductive layers according to claim 12, wherein said step of etching said first etch region etches said insulating layer so a depth of said insulating layer said first etch region corresponds to a depth of said semiconductor substructure within said insulating layer at said second etch region.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-08-21 | 1999-02-20 | 1999-08-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-08-21 | 2003-02-20 | 2003-08-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-08-21 | 2007-02-20 | 2007-08-22 | $7700.00 | Window Closed / Lapsed |