VCO bias circuit with low supply and temperature sensitivity

Claim 2

A biasing circuit, comprising: means for generating a first bias current with a first temperature coefficient and a first supply coefficient of delay; means for generating a second bias current with a second temperature coefficient and a second supply coefficient of delay; means for generating a third current with a third supply coefficient and third temperature coefficient of delay; means for summing the first, second and third bias currents to yield an output bias signal having a desired temperature coefficient and supply coefficient of delay.

Claim 3

The circuit of claim 1, further comprising: means for adjusting the relative contributions of the first, second and third bias currents to the output bias current and voltage.

Claim 4

The circuit of claim 1, further comprising means for adjusting the supply coefficient of delay and temperature coefficient of each of the current generating means.

Claim 5

A circuit for creating power supply and temperature insensitive biasing of a voltage controlled oscillator (VCO) frequency comprising: a first current reference circuit whose output current is defined by an NMOS threshold voltage, V th , and a first resistor, the fist current reference circuit exhibiting a positive supply voltage coefficient and negative temperature coefficient; a second current reference circuit whose output current is defined by an NMOS transconductance, K, and a second resistor, the second current reference circuit exhibiting a positive supply coefficient and positive temperature coefficient; a third current reference circuit comprising a differential pair of transistors, with the gate of one of the transistors biased at a constant voltage, and the gate of the other of the transistors connected to a resistive divider which senses power supply voltage, such that the output current of the one transistor of the differential pair exhibits a negative supply coefficient and a negative temperature coefficient; means for summing of the currents produced by the first, second and third reference circuits to produce an output bias signal; means for setting the relative contributions of the supply and temperature coefficients of the currents produced by the first, second and third reference circuits to enable the VCO frequency to be essentially independent of the supply voltage and temperature.

Claim 6

A circuit for creating power supply and temperature insensitive biasing of a voltage controlled oscillator (VCO) frequency comprising: a first current reference circuit whose output current is defined by an NMOS threshold voltage, V th , and a first resistor, the fist current reference circuit exhibiting a positive supply voltage coefficient and negative temperature coefficient; a second current reference circuit whose output current is defined by an NMOS transconductance, K, and a second resistor, the second current reference circuit exhibiting a positive supply coefficient and positive temperature coefficient; a third current reference circuit comprising a differential pair of transistors, with the gate of one of the transistors biased at a constant voltage, and the gate of the other of the transistors connected to a resistive divider which senses power supply voltage, such that the output current of the one transistor of the differential pair exhibits a negative supply coefficient and a negative temperature coefficient; means for summing of the currents produced by the first, second and third reference circuits to produce an output bias signal; means for setting the relative contributions of the supply and temperature coefficients of the currents produced by the first, second and third reference circuits to enable the VCO frequency to be essentially independent of the supply voltage and temperature.