US5391899A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Compound semiconductor device with a particular gate structure
Assignee: Mitsubishi Electric Corp
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Filing: 1993-12-10
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Granted: 1995-02-21
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Expires: 2013-12-10
Abstract
Abstract A compound semiconductor device includes a plurality of epitaxial compound semiconductor layers including an InGaAs layer as the uppermost layer disposed on a semi-insulating compound semiconductor substrate, a groove penetrating through at least the InGaAs layer, an insulating film disposed on the side surfaces of the groove and having ends extending beyond the groove, a gate electrode disposed in the groove and on the insulating film, and source and drain electrodes on the InGaAs layer at opposite sides of the groove self-aligned with the ends of the insulating film.
Inventors
- 👤 Yasutaka Kohno
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 19:33
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/015; H10D30/40; H10D30/47; H10D30/471; H10D30/473; H10D30/4732; H10D64/00; H10D64/01; H10D64/012; H10D64/0124; H10D64/0125
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
181 words
A compound semiconductor device comprising: a semi-insulating compound semiconductor substrate; a plurality of epitaxial compound semiconductor layers successively disposed on said substrate including an InGaAs layer as the compound semiconductor layer furthest from said substrate; a groove penetrating through said InGaAs layer and into at least one other of said compound semiconductor layers forming side surfaces on some of said compound semiconductor layers; an insulating film disposed on the side surfaces and on part of one of said compound semiconductor layers within the groove, leaving part of the compound semiconductor layer in the groove exposed, said insulating film having opposed internal surfaces generally within the groove and end parts extending beyond the groove generally parallel to and spaced from said compound semiconductor layers; a gate electrode disposed in the groove, on the internal surfaces of said insulating film, and directly contacting and forming a Schottky barrier with said compound semiconductor layer exposed in the groove; and source and drain electrodes disposed on said InGaAs layer at opposite sides of the groove respectively self-aligned with the end parts of the insulating film.
Claim 2
Dependent Claim
181 words
A compound semiconductor device comprising: a semi-insulating compound semiconductor substrate; a plurality of epitaxial compound semiconductor layers successively disposed on said substrate including an InGaAs layer as the compound semiconductor layer furthest from said substrate; a groove penetrating through said InGaAs layer and into at least one other of said compound semiconductor layers forming side surfaces on some of said compound semiconductor layers; an insulating film disposed on the side surfaces and on part of one of said compound semiconductor layers within the groove, leaving part of the compound semiconductor layer in the groove exposed, said insulating film having opposed internal surfaces generally within the groove and end parts extending beyond the groove generally parallel to and spaced from said compound semiconductor layers; a gate electrode disposed in the groove, on the internal surfaces of said insulating film, and directly contacting and forming a Schottky barrier with said compound semiconductor layer exposed in the groove; and source and drain electrodes disposed on said InGaAs layer at opposite sides of the groove respectively self-aligned with the end parts of the insulating film.
Claim 3
Dependent Claim
66 words
A compound semiconductor device in accordance with claim 1 wherein said compound semiconductor device is a high electron mobility transistor and said epitaxial compound semiconductor layers comprise a GaAs buffer layer, an n type AlGaAs layer, an n type GaAs layer, and said n type InGaAs layer, a two-dimensional electron gas being formed in the buffer layer in the vicinity of the n type AlGaAs layer.
Claim 4
Dependent Claim
24 words
A compound semiconductor device in accordance with claim 1 wherein said insulating film comprises SiN and said gate, source, and drain electrodes comprise Ti/Mo/Au.
Claim 5
Dependent Claim
36 words
A compound semiconductor device in accordance with claim 1 wherein the gate electrode is self-aligned with the end parts of the insulating film and the source and drain electrodes are in contact with said InGaAs layer.
References Cited (Backward Citations)
US4074300A
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US4141022A
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| 3.5 Years (Year 4) | 1998-02-20 | 1998-08-22 | 1999-02-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-02-20 | 2002-08-22 | 2003-02-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-02-20 | 2006-08-22 | 2007-02-21 | $7700.00 | Window Closed / Lapsed |