US5385869A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor chip bonded to a substrate and method of making
Assignee: NXP USA Inc
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Filing: 1993-07-22
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Granted: 1995-01-31
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Expires: 2013-07-22
Abstract
Abstract A semiconductor chip is flip chip bonded to a substrate having a cavity or a through hole formed therein. The cavity or through hole is preferably large enough to substantially remove the narrow gap which is formed between the portion of the substrate which does not have the cavity or through hole formed therein. This allows for use of mold processes to encapsulate and underfill the semiconductor chip and for line of sight cleaning of the semiconductor chip after bonding.
Inventors
- 👤 Jay J. Liu
- 👤 Howard M. Berg
- 👤 George W. Hawkins
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 19:56
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W74/01; H10W74/016; H10W70/00; H10W70/60; H10W70/67; H10W70/68; H10W70/681; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49146
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
163 words
A method of bonding a semiconductor chip to a substrate, comprising the steps of: providing a semiconductor chip having a first major surface and a second major surface, and having electrical interconnection means formed on the first major surface of the semiconductor chip; providing a substrate having a first major surface and a second major surface and a through hole formed therein having outer edges; electrically coupling the semiconductor chip to the substrate through the electrical interconnection means and the first major surface of the substrate such that greater than 50% of the first major surface of the semiconductor chip is exposed by the through hole; line of sight cleaning a portion of the first major surface of the semiconductor chip through the through hole; and encapsulating the semiconductor chip with an encapsulation material after the step of line of sight cleaning, wherein the encapsulation material is disposed on the first major surface of the semiconductor chip and disposed in the through hole.
Claim 2
Independent Claim
163 words
A method of bonding a semiconductor chip to a substrate, comprising the steps of: providing a semiconductor chip having a first major surface and a second major surface, and having electrical interconnection means formed on the first major surface of the semiconductor chip; providing a substrate having a first major surface and a second major surface and a through hole formed therein having outer edges; electrically coupling the semiconductor chip to the substrate through the electrical interconnection means and the first major surface of the substrate such that greater than 50% of the first major surface of the semiconductor chip is exposed by the through hole; line of sight cleaning a portion of the first major surface of the semiconductor chip through the through hole; and encapsulating the semiconductor chip with an encapsulation material after the step of line of sight cleaning, wherein the encapsulation material is disposed on the first major surface of the semiconductor chip and disposed in the through hole.
Claim 3
Dependent Claim
32 words
The method of claim 1 wherein the step of encapsulating further comprises using a molding process to encapsulate the semiconductor chip, and wherein the encapsulation material is comprised of a mold compound.
Claim 4
Dependent Claim
41 words
The method of claim 1 wherein the step of providing a substrate further comprises providing the substrate wherein the through hole is large enough to substantially allow a mold compound to flow to the first major surface of the semiconductor chip.
Claim 5
Dependent Claim
33 words
The method of claim 1 wherein the step of providing a substrate further comprises providing the substrate wherein the outer edges of the through hole are substantially close to the electrical interconnection means.
Claim 6
Dependent Claim
37 words
The method of claim 1 wherein the step of electrically coupling further comprises a gap between the semiconductor chip and a portion of the substrate which does not have the through hole formed therein being substantially removed.
Claim 7
Dependent Claim
27 words
The method of claim 1 wherein the step of encapsulating comprises using an encapsulation material comprised of a combination of a liquid encapsulant and a mold compound.
Claim 8
Dependent Claim
42 words
The method of claim 1 wherein the step of providing a substrate further comprises providing the substrate having at least one gate formed at the outer edges of the through hole, wherein the at least one gate extends past the semiconductor chip.
Claim 9
Dependent Claim
42 words
The method of claim 7 wherein the step of providing a substrate further comprises providing the substrate having the at least one gate having a minimum dimension of three times the average maximum size of a filler material comprising the encapsulation material.
Claim 10
Dependent Claim
25 words
The method of claim 1 wherein the step of encapsulating further comprises substantially no encapsulation material disposed on the second major surface of the substrate.
Claim 11
Independent Claim
140 words
A method of bonding a semiconductor chip to a substrate, comprising the steps of: providing a semiconductor chip having a first major surface and a second major surface, and having electrical interconnection means formed on the first major surface of the semiconductor chip; providing a substrate having a first major surface and a second major surface and a cavity formed therein extending from the first major surface down into at least a portion of the substrate and having outer edges; bonding the semiconductor chip to the substrate through the electrical interconnection means and the first major surface of the substrate; and encapsulating the semiconductor chip with an encapsulation material comprised of a mold compound using a molding process, wherein the encapsulation material is disposed on at least the first major surface of the semiconductor chip and disposed in the cavity.
Claim 12
Independent Claim
140 words
A method of bonding a semiconductor chip to a substrate, comprising the steps of: providing a semiconductor chip having a first major surface and a second major surface, and having electrical interconnection means formed on the first major surface of the semiconductor chip; providing a substrate having a first major surface and a second major surface and a cavity formed therein extending from the first major surface down into at least a portion of the substrate and having outer edges; bonding the semiconductor chip to the substrate through the electrical interconnection means and the first major surface of the substrate; and encapsulating the semiconductor chip with an encapsulation material comprised of a mold compound using a molding process, wherein the encapsulation material is disposed on at least the first major surface of the semiconductor chip and disposed in the cavity.
Claim 13
Dependent Claim
40 words
The method of claim 10 wherein the step of providing a substrate further comprises providing the substrate wherein the cavity is large enough to substantially allow a mold compound to flow to the first major surface of the semiconductor chip.
Claim 14
Dependent Claim
32 words
The method of claim 10 wherein the step of providing a substrate further comprises providing the substrate wherein the outer edges of the cavity are substantially close to the electrical interconnection means.
Claim 15
Dependent Claim
40 words
The method of claim 10 wherein the step of bonding further comprises a gap between the first major surface of the semiconductor chip and a portion of the substrate which does not have the cavity formed therein being substantially removed.
Claim 16
Dependent Claim
45 words
The method of claim 10 wherein the step of providing a substrate further comprises providing the substrate wherein the cavity extends across greater than 50% of the first major surface of the semiconductor chip after the step of bonding the semiconductor chip and the substrate.
Claim 17
Dependent Claim
21 words
The method of claim 10 wherein the step of encapsulating comprises using an encapsulation material further comprised of a liquid encapsulant.
Claim 18
Dependent Claim
41 words
The method of claim 10 wherein the step of providing a substrate further comprises providing a substrate having at least one gate formed at the outer edges of the cavity, wherein the at least one gate extends past the semiconductor chip.
Claim 19
Dependent Claim
52 words
The method of claim 10 wherein the step of providing the substrate further comprises the cavity extending from the first major surface of the substrate to the second major surface of the substrate and wherein greater than 50% of the first major surface of the semiconductor chip is exposed by the cavity.
References Cited (Backward Citations)
US4280132A
Cited
JPS59143333A
Cited
SU1161724A1
Cited
US4604644A
Cited
JPH01191456A
Cited
JPH01191457A
Cited
US4994411A
Cited
US5057458A
Cited
US5120665A
Cited
US5008213A
Cited
US5081067A
Cited
US5086018A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-01-30 | 1998-08-01 | 1999-01-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-01-30 | 2002-08-01 | 2003-01-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-01-30 | 2006-08-01 | 2007-01-31 | $7700.00 | Window Closed / Lapsed |