Patent US5352632A successfully refreshed from Google Patents.
US5352632A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multichip packaged semiconductor device and method for manufacturing the same
Assignee: Toshiba Corp
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Filing: 1993-05-17
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Granted: 1994-10-04
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Expires: 2013-05-17
Abstract
Abstract A plurality of semiconductor chips are mounted on a plurality of islands formed on a lead frame. Inner lead portions of the lead frame and electrode pads formed on the semiconductor chips are electrically connected to one another via first lead portions formed on a flexible resin tape and the electrode pads formed on the semiconductor chips are connected to one another via second lead portions formed on the flexible resin tape. The flexible resin tape on which the islands and inner lead portions of the lead frame, the plurality of semiconductor chips and the first and second lead portions are formed is sealed into a resin package.
Inventors
- 👤 Hiromichi Sawaya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 14:16
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/701; H10W70/00; H10W70/40; H10W70/411; H10W70/464; H10W70/466; H10W72/071; H10W72/077; H10W74/00; H10W74/10; H10W74/111; H10W90/00; H10W90/811; H10W72/851; H10W72/874; H10W72/877; H10W90/701; H10W90/721; H10W90/726; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
138 words
A semiconductor device manufacturing method comprising: a first step of mounting a plurality of semiconductor chips on at least one island formed on a lead frame; a second step of disposing a flexible resin tape on said lead frame, said resin tape having a plurality of device holes formed in positions corresponding to mounting positions of said semiconductor chips and also having a wiring pattern for electrically connecting an inner lead portion of the lead frame to electrode pads of the semiconductor chips; a third step of connecting one end of said wiring pattern formed on said flexible resin tape to the electrode pads formed on said plurality of semiconductor chips; and a fourth step of connecting the another of said wiring pattern formed on said flexible resin tape to an inner lead section of said lead frame.
Claim 2
Dependent Claim
138 words
A semiconductor device manufacturing method comprising: a first step of mounting a plurality of semiconductor chips on at least one island formed on a lead frame; a second step of disposing a flexible resin tape on said lead frame, said resin tape having a plurality of device holes formed in positions corresponding to mounting positions of said semiconductor chips and also having a wiring pattern for electrically connecting an inner lead portion of the lead frame to electrode pads of the semiconductor chips; a third step of connecting one end of said wiring pattern formed on said flexible resin tape to the electrode pads formed on said plurality of semiconductor chips; and a fourth step of connecting the another of said wiring pattern formed on said flexible resin tape to an inner lead section of said lead frame.
Claim 3
Dependent Claim
25 words
A semiconductor device manufacturing method according to claim 1, wherein said third step if effected by use of bump electrodes formed on said electrode pads.
Claim 4
Dependent Claim
20 words
A semiconductor device manufacturing method according to claim 1, wherein said fourth step is effected by use of alloy bonding.
Claim 5
Dependent Claim
50 words
A semiconductor device manufacturing method according to claim 1, wherein said wiring pattern is formed on the surface of said flexible resin tape such that the one end portion of the wiring pattern projects outside of said flexible resin tape with the other end portion projecting into said device holes.
Claim 6
Dependent Claim
195 words
A semiconductor device manufacturing method comprising: a first step of mounting a plurality of semiconductor chips on at least one island formed on a lead frame; a second step of disposing a flexible resin tape on said lead frame, said resin tape having a plurality of device holes formed in positions corresponding to mounting positions of said semiconductor chips, having a first wiring pattern for electrically connecting an inner lead portion of the lead frame to electrode pads of the semiconductor chips, and also having a second wiring pattern for interconnection of the electrode pads of said plurality of semiconductor chips; a third step of connecting one end of said first wiring pattern formed on said flexible resin tape to the electrode pads formed on said plurality of semiconductor chips; a fourth step of connecting said second wiring pattern formed on said flexible resin tape to the electrode pads formed on said plurality of semiconductor chips so as to electrically connect said semiconductor chips to one another; and a fifth step of connecting another end of said first wiring pattern formed on said flexible resin tape to an inner lead section of said lead frame.
Claim 7
Dependent Claim
195 words
A semiconductor device manufacturing method comprising: a first step of mounting a plurality of semiconductor chips on at least one island formed on a lead frame; a second step of disposing a flexible resin tape on said lead frame, said resin tape having a plurality of device holes formed in positions corresponding to mounting positions of said semiconductor chips, having a first wiring pattern for electrically connecting an inner lead portion of the lead frame to electrode pads of the semiconductor chips, and also having a second wiring pattern for interconnection of the electrode pads of said plurality of semiconductor chips; a third step of connecting one end of said first wiring pattern formed on said flexible resin tape to the electrode pads formed on said plurality of semiconductor chips; a fourth step of connecting said second wiring pattern formed on said flexible resin tape to the electrode pads formed on said plurality of semiconductor chips so as to electrically connect said semiconductor chips to one another; and a fifth step of connecting another end of said first wiring pattern formed on said flexible resin tape to an inner lead section of said lead frame.
Claim 8
Dependent Claim
27 words
A semiconductor device manufacturing method according to claim 5, wherein said third and fourth steps are effected by use of bump electrodes formed on said electrode pads.
Claim 9
Dependent Claim
20 words
A semiconductor device manufacturing method according to claim 5, wherein said fifth step is effected by use of alloy bonding.
Claim 10
Dependent Claim
97 words
A semiconductor device manufacturing method according to claim 5, wherein said first wiring pattern is formed on the surface of said flexible resin tape such that the one end portion of the wiring pattern projects outside of said flexible resin tape with the other end portion projecting into said device hole, and said second wiring pattern is formed on the surface of said flexible resin tape such that one end portion of the second wiring pattern projects into said device holes, with another end portion of the second wiring pattern projecting outside of said flexible resin tape.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-10-03 | 1998-04-04 | 1998-10-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-10-03 | 2002-04-04 | 2002-10-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-10-03 | 2006-04-04 | 2006-10-04 | $7700.00 | Window Closed / Lapsed |