Semiconductor device and production method thereof

Claim 1

A method for producing a semiconductor device comprising the steps of: forming a first circuit pattern on a substrate having an etching stopper layer in a predetermined depth of said substrate corresponding to a thickness of a compound semiconductor chip and an adhesive of eutectic crystal alloy, etching a predetermined area of a silicon substrate up to the etching stopper layer by anisotropy etching to form a concave portion substantially aligning said first circuit pattern and said corresponding compound semiconductor chip, said concave portion having a side wall inclination substantially greater than a side wall inclination of said corresponding compound semiconductor ship in order to facilitate insertion of said compound semiconductor chip into said concave portion, bonding said compound semiconductor chip directly onto a bottom of said substrate in the concave portion with said adhesive of eutectic crystal alloy, said compound semiconductor chip being substantially aligned with said first circuit pattern, forming a flat insulating film layer surface for covering an electrode of the compound semiconductor chip and a space between a peripheral wall of the concave portion and a side wall of the compound semiconductor chip, patterning the flat insulative film layer surface to expose the electrode of the compound semiconductor chip, and forming a second connecting circuit pattern on the insulating film layer surface for connecting between the exposed electrode on the compound semiconductor chip and said first connecting circuit pattern to form a high-density thin-film circuit.

Claim 2

A method for producing a semiconductor device comprising the steps of: forming a first circuit pattern on a substrate having an etching stopper layer in a predetermined depth of said substrate corresponding to a thickness of a compound semiconductor chip and an adhesive of eutectic crystal alloy, etching a predetermined area of a silicon substrate up to the etching stopper layer by anisotropy etching to form a concave portion substantially aligning said first circuit pattern and said corresponding compound semiconductor chip, said concave portion having a side wall inclination substantially greater than a side wall inclination of said corresponding compound semiconductor ship in order to facilitate insertion of said compound semiconductor chip into said concave portion, bonding said compound semiconductor chip directly onto a bottom of said substrate in the concave portion with said adhesive of eutectic crystal alloy, said compound semiconductor chip being substantially aligned with said first circuit pattern, forming a flat insulating film layer surface for covering an electrode of the compound semiconductor chip and a space between a peripheral wall of the concave portion and a side wall of the compound semiconductor chip, patterning the flat insulative film layer surface to expose the electrode of the compound semiconductor chip, and forming a second connecting circuit pattern on the insulating film layer surface for connecting between the exposed electrode on the compound semiconductor chip and said first connecting circuit pattern to form a high-density thin-film circuit.