US4483067A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing an identification card and an identification manufactured, for example, by this method
Assignee: US Philips Corp
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Filing: 1982-09-10
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Granted: 1984-11-20
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Expires: 2002-09-10
Abstract
Abstract An identification card with an integrated semiconductor circuit (13) which is mounted on a secondary carrier (11) and which is electrically connected to conductor patterns (3, 5) on both sides of the secondary carrier (11). The secondary carrier (11) is mounted in a primary carrier (29) together with the integrated semiconductor circuit (13). The secondary carrier (11) comprises a plated-through hole (7) which is partly removed in order to form a recess (15) in the secondary carrier (11) in which the semiconductor circuit (13) is accommodated. The semiconductor circuit (13) is electrically connected, by means of connection wires (23, 25), to a conductor pattern (3) on the secondary carrier (11) and, also using an electrically conductive glue (21) and the metal hole plating (18) of the remainder (17) of the plate-through hole (7), to the other conductor pattern (5) on the secondary carrier (11).
Inventors
- 👤 Paul Parmentier
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 23:48
CPC Classifications
G; G06; G06K; G06K19/00; G06K19/06; G06K19/067; G06K19/07; G06K19/077; G06K19/07745; H; H10; H10W; H10W20/00; H10W20/40; H10W70/00; H10W70/60; H10W70/611; H10W70/62; H10W70/63; H10W70/635; H10W70/67; H10W70/68; H05; H05K; H05K1/00; H05K1/18; H05K1/182; H05K1/184; H05K3/00; H05K3/0094; H10W70/681; H10W70/682; H10W72/00; H10W72/071; H10W72/073; H10W72/07351; H10W72/07353; H10W72/30; H10W72/331; H10W72/334; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W74/00; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754; Y; Y10; Y10S; Y10S283/00; Y10S283/904; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49144
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
195 words
A method of manufacturing an identification card in which an integrated semiconductor circuit is brought into electrical contact on both sides with conductor patterns on at least one side of a secondary carrier which is subsequently mounted, together with the integrated circuit, in a primary carrier, the integrated circuit being enclosed by a quantity of electrically insulating material which fills a recess in one of said carriers, comprising the steps of: providing the secondary carrier (11) which comprises a conductor pattern (3, 5) on both sides with at least one plated-through hole (7); providing a recess (15) subsequently at the area of said hole (7) in the secondary carrier (11); said recess (15) opening into the part (17) of the plated-through hole (7) which remains after the formation of the recess (15); arranging the integrated circuit (13) subsequently in the recess (15) and connecting it on one side, by means of an electrically conductive bonding medium (21) and the metal hole plating (18), to the conductor pattern (5) on one side of the secondary carrier (11), and connecting its other sidesubsequently to the conductor pattern (3) on the other side of the secondary carrier (11).
Claim 2
Independent Claim
195 words
A method of manufacturing an identification card in which an integrated semiconductor circuit is brought into electrical contact on both sides with conductor patterns on at least one side of a secondary carrier which is subsequently mounted, together with the integrated circuit, in a primary carrier, the integrated circuit being enclosed by a quantity of electrically insulating material which fills a recess in one of said carriers, comprising the steps of: providing the secondary carrier (11) which comprises a conductor pattern (3, 5) on both sides with at least one plated-through hole (7); providing a recess (15) subsequently at the area of said hole (7) in the secondary carrier (11); said recess (15) opening into the part (17) of the plated-through hole (7) which remains after the formation of the recess (15); arranging the integrated circuit (13) subsequently in the recess (15) and connecting it on one side, by means of an electrically conductive bonding medium (21) and the metal hole plating (18), to the conductor pattern (5) on one side of the secondary carrier (11), and connecting its other sidesubsequently to the conductor pattern (3) on the other side of the secondary carrier (11).
References Cited (Backward Citations)
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Cited
US3885304A
Cited
US4004133A
Cited
US3934336A
Cited
US4216577A
Cited
GB2047474A
Cited
US4264917A
Cited
US4396936A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-11-20 | 1988-05-21 | 1988-11-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-11-20 | 1992-05-21 | 1992-11-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-11-20 | 1996-05-21 | 1996-11-20 | $7700.00 | Window Closed / Lapsed |