Asynchronous pulse converter

Claim 1

An electronic pulse converter circuit for converting a sequence of asynchronous pulses of indefinite duration into a sequence of synchronous pulses of predetermined duration having a leading edge and a trailing edge, including: a. input detection means, having an input coupled to the sequence of asynchronous pulses, for detecting when an asynchronous input pulse to the input detection means transitions from a relatively low voltage state to a relatively high voltage state, or vice versa, and having an output indicative of the transition; b. synchronization means, coupled to the output of the input detection means, for generating first and second output signals indicative of a beginning time and an ending time of a synchronous pulse corresponding to an asynchronous input pulse, the synchronization means including: (1) first latching means, having an output, an input coupled to the output of the input detection means, and an input coupled to a reference clock, for outputting a first signal synchronized with a first leading edge of the reference clock and in response to a transition indication from the input detection means; (2) second latching means, having an output, a signal input coupled to the output of the first latching means, and a clock input coupled to the reference clock, for outputing a second signal synchronized with a second leading edge of the reference clock and in response to the output of the first latching means; c. difference detection means, having an output, a first input coupled to the output of the first latching means, and a second input coupled to the output of the second latching means, for outputing a pulse synchronous with the reference clock if a difference exists between the logic level of the first and second inputs to the difference detection means.