Method of making metal oxide semiconductor field effect transistor

Claim 1

A method of making a metal oxide semiconductor filed effect transistor comprising the steps of; forming a field region in a substrate of a first conductivity type to define the field region and an active region; forming a gate insulating film on the active region; implanting an impurity in the active region to control a threshold voltage; forming a polysilicon film on the whole surface of the gate substrate; etching the polysilicon film and the gate insulating film to form a gate electrode on the active region; forming an insulating film on the whole surface of the substrate; anisotropically etching the insulating film with RIE method to form sidewall spacers at side surfaces of the gate electrode and the gate insulating film; implanting a high concentration impurity of a second conductivity type in the active region between the field region and the sidewall spacers to form high concentration source/drain regions of a second conductivity type, by self-aligning with the sidewall spacers as a mask; forming a thick insulating film and a gate cap insulating film; removing the insulating film for sidewall spacers; and implanting a low concentration impurity of a second conductivity type and a low concentration impurity of a first conductivity type self-aligning with the thick insulating film and the gate electrode as a mask, to form low concentration source/drain regions of a second conductivity type coming into contact with high concentration source/drain region in the active region and to form a low concentration impurity region of a first conductivity type enclosing low concentration source/drain regions of the second conductivity type in the active region.

Claim 2

A method of making a metal oxide semiconductor filed effect transistor comprising the steps of; forming a field region in a substrate of a first conductivity type to define the field region and an active region; forming a gate insulating film on the active region; implanting an impurity in the active region to control a threshold voltage; forming a polysilicon film on the whole surface of the gate substrate; etching the polysilicon film and the gate insulating film to form a gate electrode on the active region; forming an insulating film on the whole surface of the substrate; anisotropically etching the insulating film with RIE method to form sidewall spacers at side surfaces of the gate electrode and the gate insulating film; implanting a high concentration impurity of a second conductivity type in the active region between the field region and the sidewall spacers to form high concentration source/drain regions of a second conductivity type, by self-aligning with the sidewall spacers as a mask; forming a thick insulating film and a gate cap insulating film; removing the insulating film for sidewall spacers; and implanting a low concentration impurity of a second conductivity type and a low concentration impurity of a first conductivity type self-aligning with the thick insulating film and the gate electrode as a mask, to form low concentration source/drain regions of a second conductivity type coming into contact with high concentration source/drain region in the active region and to form a low concentration impurity region of a first conductivity type enclosing low concentration source/drain regions of the second conductivity type in the active region.

Claim 10

A method of making a metal oxide semiconductor field effect transistor comprising the steps of; forming a field region in a substrate of a first conductivity type to define the field region and an active region; forming a gate oxide film on the active region; implanting an impurity in the active region to control a threshold voltage; forming a polysilicon film over the whole surface of the substrate; etching the polysilicon film and the gate oxide film to form the gate electrode on the active region; forming a thin insulating film over the whole surface of the substrate; forming a semiconductor layer on the thin insulating film; anisotopically etching the thin insulating film and the semiconductor layer with a RIE method to form sidewall spacers at side surfaces of the gate electrode and the gate oxide film; implanting a high concentration impurity of a second conductivity type to form high concentration source/drain regions of a second conductivity type, by self-aligning with the sidewall spacers as a mask; removing the semiconductor layer for sidewall spacers; forming a thick insulating film and a gate cap insulating film; removing the thin insulating film for sidewall spacers; and implanting a low concentration impurity of a second conductivity type and a low concentration impurity of a first conductivity type self-aligning with the gate electrode and the thick insulating film as a mask, to form low concentration source/drain regions of a second conductivity type coming into contact with high concentration source/drain regions and to form a low concentration impurity region of a first conductivity type enclosing low concentrating source/drain regions of the second conductivity type, in the active region.

Claim 11

A method of making a metal oxide semiconductor field effect transistor comprising the steps of; forming a field region in a substrate of a first conductivity type to define the field region and an active region; forming a gate oxide film on the active region; implanting an impurity in the active region to control a threshold voltage; forming a polysilicon film over the whole surface of the substrate; etching the polysilicon film and the gate oxide film to form the gate electrode on the active region; forming a thin insulating film over the whole surface of the substrate; forming a semiconductor layer on the thin insulating film; anisotopically etching the thin insulating film and the semiconductor layer with a RIE method to form sidewall spacers at side surfaces of the gate electrode and the gate oxide film; implanting a high concentration impurity of a second conductivity type to form high concentration source/drain regions of a second conductivity type, by self-aligning with the sidewall spacers as a mask; removing the semiconductor layer for sidewall spacers; forming a thick insulating film and a gate cap insulating film; removing the thin insulating film for sidewall spacers; and implanting a low concentration impurity of a second conductivity type and a low concentration impurity of a first conductivity type self-aligning with the gate electrode and the thick insulating film as a mask, to form low concentration source/drain regions of a second conductivity type coming into contact with high concentration source/drain regions and to form a low concentration impurity region of a first conductivity type enclosing low concentrating source/drain regions of the second conductivity type, in the active region.