US5319224A — Integrated circuit device having a geometry to en…

Claim 1

Independent Claim 93 words

An integrated circuit device, comprising: a semiconductor substrate; a circuit region formed on said substrate and containing a circuit for performing a predetermined function; bonding pads on said substrate at a bonding pad region unoccupied by said circuit; and interconnections between said bonding pads and corresponding input/output terminals of said circuit; wherein said bonding pads comprise a plurality of bonding pads on each of only three sides of said substrate, and a portion of said circuit region on said substrate protrudes from a portion of said substrate bounded by said bonding pad region.

Claim 2

Dependent Claim 93 words

An integrated circuit device, comprising: a semiconductor substrate; a circuit region formed on said substrate and containing a circuit for performing a predetermined function; bonding pads on said substrate at a bonding pad region unoccupied by said circuit; and interconnections between said bonding pads and corresponding input/output terminals of said circuit; wherein said bonding pads comprise a plurality of bonding pads on each of only three sides of said substrate, and a portion of said circuit region on said substrate protrudes from a portion of said substrate bounded by said bonding pad region.

Claim 3

Dependent Claim 89 words

A plurality of integrated circuit devices each having a separate substrate of a different planar size and each having a circuit formed on the substrate having a plurality of connection nodes, the function of said circuit being different for each integrated circuit device, each of said integrated circuit devices comprising a plurality of bonding pads formed on said substrate, the number and layout of said bonding pads being common among said plurality of integrated circuit devices, said bonding pads being electrically connected to corresponding connection nodes of said circuit.

Claim 4

Dependent Claim 89 words

A plurality of integrated circuit devices each having a separate substrate of a different planar size and each having a circuit formed on the substrate having a plurality of connection nodes, the function of said circuit being different for each integrated circuit device, each of said integrated circuit devices comprising a plurality of bonding pads formed on said substrate, the number and layout of said bonding pads being common among said plurality of integrated circuit devices, said bonding pads being electrically connected to corresponding connection nodes of said circuit.

Claim 5

Independent Claim 105 words

A method of manufacturing a plurality of integrated circuit devices each having different outer or edge circuit layout boundaries on respective substrates, comprising the steps of: preparing a plural number of separate, dissimilar substrates; forming a plurality of bonding pads on each substrate, the number and layout of said bonding pads being common for all said plurality of integrated circuit devices; forming circuits in regions of each substrate not occupied by said plurality of bonding pads, the signal processing functions of the circuits are different for each substrate; and interconnecting said input/output terminals of said circuits to respective ones of said plurality of bonding pads.

Claim 6

Independent Claim 105 words

A method of manufacturing a plurality of integrated circuit devices each having different outer or edge circuit layout boundaries on respective substrates, comprising the steps of: preparing a plural number of separate, dissimilar substrates; forming a plurality of bonding pads on each substrate, the number and layout of said bonding pads being common for all said plurality of integrated circuit devices; forming circuits in regions of each substrate not occupied by said plurality of bonding pads, the signal processing functions of the circuits are different for each substrate; and interconnecting said input/output terminals of said circuits to respective ones of said plurality of bonding pads.

Claim 7

Dependent Claim 47 words

The method according to claim 3, further comprising a step of: after the step of interconnecting, testing wafers of said plurality of integrated circuit devices by the same probe card having probes the number and layout of which are the same as those of said bonding pads.

Claim 8

Dependent Claim 35 words

The method according to claim 3, further comprising a step of: after the step of interconnecting, incorporating said plurality of integrated circuit devices in the same type of packages having a common external electrode pattern.

Claim 9

Dependent Claim 61 words

The method of manufacturing integrated circuit devices in accordance with claim 3, wherein said plurality of substrates (10, 20) have respective rectangular surfaces of different size, and said bonding pads (11, 21) are arranged in the same pattern, respectively, near outer circumferences along one to three sides out of four sides of the surface of each of said substrates (10, 20).

Claim 10

Dependent Claim 72 words

The method of manufacturing integrated circuit devices in accordance with claim 3, wherein said plurality of substrates (10, 20) have respective rectangular surfaces of different size, said bonding pads (11, 21) are arranged on sides of the respective rectangles having sides each substantially parallel to the sides of said substrates (10, 20), and said circuits (12, 22) are formed inside and outside the respective regions enclosed by said bonding pads (11, 21)

Claim 11

Dependent Claim 74 words

The method of manufacturing integrated circuit devices in accordance with claim 3, further comprising the step of forming an input and/or output buffer circuits (17) in regions between said bonding pads (11, 21) and said circuit (12, 22) before the step of providing the interconnection processing, wherein the input/output terminals of said circuits (12, 22) are interconnected to said bonding pads (11, 21) corresponding to the input/output terminals through said input/output buffer circuit (17).

Claim 12

Independent Claim 120 words

A method of manufacturing a plurality of integrated circuit devices each having different outer or edge circuit layout boundaries on respective substrates, comprising the steps of: preparing a plurality of separate substrates, each substrate having a different planar size; forming circuits on each substrate, the signal processing functions of the circuits are different for each substrate; covering the respective surfaces of said circuits on each substrate with an interlayer insulation film; forming a plurality of bonding pads on each integrated circuit device on said interlayer insulation film, the number and layout of said bonding pads being common for all said integrated circuit devices; and interconnecting said input/output terminals of said circuits to respective ones of said plurality of bonding pads.

Claim 13

Independent Claim 120 words

A method of manufacturing a plurality of integrated circuit devices each having different outer or edge circuit layout boundaries on respective substrates, comprising the steps of: preparing a plurality of separate substrates, each substrate having a different planar size; forming circuits on each substrate, the signal processing functions of the circuits are different for each substrate; covering the respective surfaces of said circuits on each substrate with an interlayer insulation film; forming a plurality of bonding pads on each integrated circuit device on said interlayer insulation film, the number and layout of said bonding pads being common for all said integrated circuit devices; and interconnecting said input/output terminals of said circuits to respective ones of said plurality of bonding pads.

Claim 14

Dependent Claim 47 words

The method according to claim 9, further comprising a step of: after the step of interconnecting, testing wafers of said plurality of integrated circuit devices by the same probe card having probes the number and layout of which are the same as those of said bonding pads.

Claim 15

Dependent Claim 35 words

The method according to claim 9, further comprising a step of: after the step of interconnecting, incorporating said plurality of integrated circuit devices in the same type of packages having a common external electrode pattern.

Claim 16

Dependent Claim 68 words

The method of manufacturing integrated circuit devices in accordance with claim 9, wherein said plurality of substrates (10, 20) have respective rectangular surfaces of different size, and in the step of forming said bonding pads (11, 21), said bonding pads (11, 21) are arranged on sides of respective rectangles which are substantially parallel to the respective sides of said substrates (10, 20), on said interlayer insulation film (16a).

Claim 17

Dependent Claim 130 words

A plurality of different integrated circuit devices having common numbers and layouts of bonding pads, each integrated circuit device comprising a substrate having a different planar size; a circuit formed on said substrate for performing a predetermined function which is different for each integrated circuit device, said circuit including input/output terminals for providing electrical signals to and from said circuit; a plurality of bonding pads formed on said substrate, the number of said plurality of bonding pads being equal to or greater than the number of input/output terminals; and interconnection means for electrically connecting said plurality of bonding pads with a corresponding input/output terminal; wherein the number and layout of said plurality of bonding pads is common among each integrated circuit device of said plurality of different integrated circuit devices.

Claim 18

Dependent Claim 130 words

A plurality of different integrated circuit devices having common numbers and layouts of bonding pads, each integrated circuit device comprising a substrate having a different planar size; a circuit formed on said substrate for performing a predetermined function which is different for each integrated circuit device, said circuit including input/output terminals for providing electrical signals to and from said circuit; a plurality of bonding pads formed on said substrate, the number of said plurality of bonding pads being equal to or greater than the number of input/output terminals; and interconnection means for electrically connecting said plurality of bonding pads with a corresponding input/output terminal; wherein the number and layout of said plurality of bonding pads is common among each integrated circuit device of said plurality of different integrated circuit devices.

Claim 19

Dependent Claim 69 words

The method of manufacturing integrated circuit devices in accordance with claim 13, wherein said plurality of substrates (10, 20) have respective rectangular surfaces of different size, and in the step of forming said bonding pads (11, 21), said bonding pads (11, 21) are arranged in matrix to form respective rectangles having sides roughly parallel to the respective sides of said substrates (10, 20), on said interlayer insulation film (16a).

Claim 20

Dependent Claim 64 words

The method of manufacturing integrated circuit devices in accordance with claim 28, further comprising the step of forming an input and/or output buffer circuit (17) outside regions on said interlayer insulation film (16a) where said bonding pads (11, 21) are formed before the step of providing the interconnection processing, wherein said interconnection processing is carried out through said input and/or output buffer circuit (18).

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1997-06-06	1997-12-06	1998-06-07	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2001-06-06	2001-12-06	2002-06-07	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2005-06-06	2005-12-06	2006-06-07	$7700.00	Window Closed / Lapsed

Integrated circuit device having a geometry to enhance fabrication and testing and manufacturing method thereof

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