Patent US1853978A successfully refreshed from Google Patents.
US5017993A
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Semiconductor integrated circuit device with bus lines
Assignee: Hitachi Ltd
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Filing: 1990-02-20
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Granted: 1991-05-21
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Expires: 2010-02-20
Abstract
Abstract A semiconductor integrated circuit device, in which a system including a plurality of modules (functional blocks) such as a microprocessor unit and a memory unit is integrated on the main surface of a single semiconductor substrate, and each module of the system is connected through its corresponding interface circuits to the external terminals. The external terminals and the interface circuits are provided on the main surface of said semiconductor substrate, and are connected through an internal bus line commonly used between said modules. Also, and commonly use or internal bus line is connected directly to said external terminals to permit connection to a common external bus line.
Inventors
- 👤 Manabu Shibata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 21:14
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/10; H10D89/60; H10D89/601; H10D89/921; G; G11; G11C; G11C5/00; G11C5/02; G11C5/025; H10D84/00
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
133 words
A semiconductor integrated circuit device comprising: (a) a semiconductor substrate having a main surface; (b) a plurality of functional blocks provided on said main surface of the semiconductor substrate, said blocks including at least a microprocessor unit; (c) a plurality of interface circuits provided around said plurality of functional blocks on the main surface of the semiconductor substrate, said interface circuits being coupled to said functional blocks corresponding thereto; (d) a plurality of external terminals arranged at a peripheral portion of the main surface of said semiconductor substrate; and (e) an internal bus comprised of a plurality of signal lines provided on said semiconductor substrate and commonly used between said functional blocks, wherein said plurality of interface circuits and said plurality of external terminals are coupled to one another through said internal bus.
Claim 2
Dependent Claim
133 words
A semiconductor integrated circuit device comprising: (a) a semiconductor substrate having a main surface; (b) a plurality of functional blocks provided on said main surface of the semiconductor substrate, said blocks including at least a microprocessor unit; (c) a plurality of interface circuits provided around said plurality of functional blocks on the main surface of the semiconductor substrate, said interface circuits being coupled to said functional blocks corresponding thereto; (d) a plurality of external terminals arranged at a peripheral portion of the main surface of said semiconductor substrate; and (e) an internal bus comprised of a plurality of signal lines provided on said semiconductor substrate and commonly used between said functional blocks, wherein said plurality of interface circuits and said plurality of external terminals are coupled to one another through said internal bus.
Claim 3
Dependent Claim
50 words
A semiconductor integrated circuit device according to claim 1, wherein said internal bus is arranged substantially in a central portion of said semiconductor substrate, and wherein said functional blocks are respectively arranged in predetermined locations along both sides of said internal bus in a predetermined direction in which it extends.
Claim 4
Dependent Claim
28 words
A semiconductor integrated circuit device according to claim 1, wherein said internal bus is arranged on the main surface of the semiconductor substrate adjacent to said external terminals.
Claim 5
Dependent Claim
98 words
A semiconductor integrated circuit device according to claim 1, further comprising signal lines other than those of said internal bus provided on the main surface of said semiconductor substrate and a plurality of other interface circuits provided on the main surface of said semiconductor substrate, being coupled to the signal lines other than those of said internal bus, wherein each of the interface circuits coupled to said internal bus is formed in a smaller area than an area occupied by each of the other interface circuits coupled to the signal lines other than those of said internal bus.
Claim 6
Dependent Claim
44 words
A semiconductor integrated circuit device according to claim 4, wherein the interface circuits coupled to said internal bus are arranged in a predetermined region in which the other interface circuits coupled to the signal lines other than those of said internal bus are arranged.
Claim 7
Dependent Claim
27 words
A semiconductor integrated circuit device according to claim 1, wherein the interface circuits coupled to said internal bus include a bipolar transistor as an output stage transistor.
Claim 8
Dependent Claim
20 words
A semiconductor integrated circuit device according to claim 1, wherein said internal bus is connected directly to said external terminals.
Claim 9
Dependent Claim
30 words
A semiconductor integrated circuit device according to claim 2, wherein the arrangements of each of said functional blocks and the internal bus are determined by use of an automatic design.
Claim 10
Dependent Claim
61 words
A semiconductor integrated circuit device according to claim 2, wherein a first set of said external terminals is arranged adjacent one side of said substrate, and a second set of said external terminals is arranged at an opposite side of said substrate, and further wherein said internal bus is arranged to extend between said first and second set of external terminals.
Claim 11
Dependent Claim
56 words
A semiconductor integrated circuit device according to claim 1, further comprising a common external bus coupled to said external terminals such that a plurality of signal lines of said common external bus are coupled to said functional blocks through said external terminals, said plurality of signal lines of said common internal bus and said interface circuits.
Claim 12
Dependent Claim
56 words
A semiconductor integrated circuit device according to claim 9, further comprising a common external bus coupled to said external terminals such that a plurality of signal lines of said common external bus are coupled to said functional blocks through said external terminals, said plurality of signal lines of said common internal bus and said interface circuits.
Claim 13
Dependent Claim
79 words
A semiconductor integrated circuit device according to claim 3, wherein at least predetermined ones of said external terminals are arranged to be in line with one another along a predetermined direction, and wherein at least a portion of said internal bus is arranged to extend adjacent to said peripheral portion of said main surface of said semiconductor substrate between said interface circuits and said predetermined ones of said external terminals in a direction substantially parallel to said predetermined direction.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-05-20 | 1994-11-19 | 1995-05-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-05-20 | 1998-11-19 | 1999-05-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-05-20 | 2002-11-19 | 2003-05-21 | $7700.00 | Window Closed / Lapsed |