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US5318919A Expired / Lapsed US ⏱️ 0.0 years remaining

Manufacturing method of thin film transistor

Assignee: Sanyo Electric Co Ltd
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Filing: 1991-07-30
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Granted: 1994-06-07
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Expires: 2011-07-30
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Abstract

Abstract A manufacturing method of a thin film transistor, wherein a laminated body consisting of an intrinsic amorphous silicon layer and a conductive amorphous silicon layer is formed on a glass substrate, and annealed at low temperatures not higher than 600° C. thereby obtaining a polycrystalline silicon film. The conductive amorphous silicon layer gives girth to a core for polycrystallization, and therefore the intrinsic amorphous silicon layer is easily recrystallized by annealing at low temperatures.

Inventors

  • 👤 Shigeru Noguchi
  • 👤 Satoshi Ishida
  • 👤 Hiroshi Iwata
  • 👤 Keiichi Sano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 04:21
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/24; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6729; H10D30/673; H10D30/6731; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6745; H10P14/29; H10P14/2901; H10P14/2922; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; H10P14/3442; H10P14/3451; H10P14/3452; H10P14/3456; H10P14/38; H10P14/3802

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 124 words
A method of manufacturing a thin film transistor having a polycrystalline silicon film wherein an ohmic contact part and a channel part have conductivity opposite to each other, comprising: laminating, on a substrate in the region corresponding to the ohmic contact part, an intrinsic amorphous silicon layer and a first conductive amorphous silicon layer to form a first laminated body; laminating, on the substrate in the region corresponding to the channel part, an intrinsic amorphous silicon layer and a second conductive amorphous silicon layer to form a second laminated body; said second conductive amorphous silicon layer having a conductivity opposite to that of said first conductive amorphous silicon layer; and annealing said first and said second laminated body, thereby forming said polycrystalline silicon film.
Claim 2
Independent Claim 124 words
A method of manufacturing a thin film transistor having a polycrystalline silicon film wherein an ohmic contact part and a channel part have conductivity opposite to each other, comprising: laminating, on a substrate in the region corresponding to the ohmic contact part, an intrinsic amorphous silicon layer and a first conductive amorphous silicon layer to form a first laminated body; laminating, on the substrate in the region corresponding to the channel part, an intrinsic amorphous silicon layer and a second conductive amorphous silicon layer to form a second laminated body; said second conductive amorphous silicon layer having a conductivity opposite to that of said first conductive amorphous silicon layer; and annealing said first and said second laminated body, thereby forming said polycrystalline silicon film.
Claim 3
Independent Claim 162 words
A method of manufacturing a thin film transistor having a polycrystalline silicon film wherein an ohmic contact part and a channel part have conductivity opposite to each other, comprising: laminating, on a substrate in the region corresponding to the ohmic contact part, an intrinsic amorphous silicon layer and a first conductive amorphous silicon layer to form a first laminated body; laminating, on the substrate in the region corresponding to the channel part, an intrinsic amorphous silicon layer and a second conductive amorphous silicon layer to form a second laminated body; said second conductive amorphous silicon layer having a conductivity opposite to that of said first conductive amorphous silicon layer; annealing said first and said second laminated body, thereby obtaining a polycrystalline silicon film; forming an insulating film on said polycrystalline silicon film; forming a contact hole in said insulating film; forming a gate electrode over said channel part; and forming a drain electrode and a source electrode over said ohmic contact part.
Claim 4
Independent Claim 162 words
A method of manufacturing a thin film transistor having a polycrystalline silicon film wherein an ohmic contact part and a channel part have conductivity opposite to each other, comprising: laminating, on a substrate in the region corresponding to the ohmic contact part, an intrinsic amorphous silicon layer and a first conductive amorphous silicon layer to form a first laminated body; laminating, on the substrate in the region corresponding to the channel part, an intrinsic amorphous silicon layer and a second conductive amorphous silicon layer to form a second laminated body; said second conductive amorphous silicon layer having a conductivity opposite to that of said first conductive amorphous silicon layer; annealing said first and said second laminated body, thereby obtaining a polycrystalline silicon film; forming an insulating film on said polycrystalline silicon film; forming a contact hole in said insulating film; forming a gate electrode over said channel part; and forming a drain electrode and a source electrode over said ohmic contact part.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-06-06 1997-12-06 1998-06-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-06-06 2001-12-06 2002-06-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-06-06 2005-12-06 2006-06-07 $7700.00 Window Closed / Lapsed

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