Patent US441938A successfully refreshed from Google Patents.
Patent US5314841A successfully refreshed from Google Patents.
US5314841A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of forming a frontside contact to the silicon substrate of a SOI wafer
Assignee: Tamiras Per Pte Ltd LLC
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Filing: 1993-04-30
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Granted: 1994-05-24
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Expires: 2013-04-30
Abstract
Abstract A method of having a frontside contact to a SOI wafer is described. Before any device processing steps a trench is etched through the SOI layers to the substrate. This trench is maintained during device processing and opened during source/drain implantation. At metallization an ohmic contact is made to the substrate.
Inventors
- 👤 Frederick T. Brady
- 👤 Nadim F. Haddad
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 09:49
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/021
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
117 words
A method of fabricating a frontside contact to a silicon-on-insulator substrate, the substrate having a dopant type, comprising the steps of: defining a trench region on the surface of the SOI substrate before normal semiconductor device processing; etching the SOI layers down to the substrate; removing any trench defining material and continuing with normal device processing; opening the trench region during ion implantation of a dopant species of the same type as the substrate; covering the trench region during ion implantation of a dopant species of a different type as the substrate; and depositing metal in portions of the trench region during normal device processing to form an ohmic contact to the frontside of the SOI substrate.
Claim 2
Independent Claim
117 words
A method of fabricating a frontside contact to a silicon-on-insulator substrate, the substrate having a dopant type, comprising the steps of: defining a trench region on the surface of the SOI substrate before normal semiconductor device processing; etching the SOI layers down to the substrate; removing any trench defining material and continuing with normal device processing; opening the trench region during ion implantation of a dopant species of the same type as the substrate; covering the trench region during ion implantation of a dopant species of a different type as the substrate; and depositing metal in portions of the trench region during normal device processing to form an ohmic contact to the frontside of the SOI substrate.
Claim 3
Dependent Claim
14 words
The method according to claim 1 wherein the trench has a sloping edge profile.
Claim 4
Dependent Claim
19 words
The method of claim 1 wherein the trench forms a ring around a plurality of active semiconductor devices period.
Claim 5
Dependent Claim
21 words
The method of claim 1 wherein the trench is formed as a plurality of rectilinear openings interspaced between active semiconductor devices.
Claim 6
Dependent Claim
100 words
In a silicon-on-insulator wafer, a method of forming a frontside contact comprising the steps of: a) defining a substrate contact region by use of photoresist b) etching a trench in the exposed contact regions; c) stripping the photoresist and resuming normal device processing; d) covering the substrate during implantation of a dopant of the opposite type from the substrate; e) opening the substrate trench region during implantation of similar dopant types to the substrate; and f) resume processing of the remaining fabrication steps to form a metal contact having ohmic contact to the silicon substrate via of the SOI wafer.
Claim 7
Dependent Claim
100 words
In a silicon-on-insulator wafer, a method of forming a frontside contact comprising the steps of: a) defining a substrate contact region by use of photoresist b) etching a trench in the exposed contact regions; c) stripping the photoresist and resuming normal device processing; d) covering the substrate during implantation of a dopant of the opposite type from the substrate; e) opening the substrate trench region during implantation of similar dopant types to the substrate; and f) resume processing of the remaining fabrication steps to form a metal contact having ohmic contact to the silicon substrate via of the SOI wafer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-23 | 1997-11-22 | 1998-05-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-23 | 2001-11-22 | 2002-05-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-23 | 2005-11-22 | 2006-05-24 | $7700.00 | Window Closed / Lapsed |