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US5292679A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for producing a semiconductor memory device having memory cells including transistors and capacitors

Assignee: United Microelectronics Corp
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Filing: 1993-04-21
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Granted: 1994-03-08
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Expires: 2013-04-21
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Abstract

Abstract A semiconductor memory device having an excellent data holding characteristics because of a small leak current from a trench and a process for producing the same are disclosed. An SiO 2 film 12 having an appropriate pattern is formed on a P type silicon substrate 11. Trenches 14 are relatively formed on the SiO 2 film 12 by selectively growing a P type epitaxial layer 13 on the silicon substrate 11 using the SiO 2 film 12 as a mask. An N type layer 23 acting as an electrode of a capacitor 27 is formed on the inner wall of the trench 14 by the oblique ion implantation of impurities 22 thereto. A polycrystalline silicon film 25 acting as an opposite electrode of the capacitor 27 is formed on an ONO film 24 so that the ONO film 24 is disposed between the polysilicon film 25 and the SiO 2 film. The semiconductor memory device which is produced by this method without etching to form the trenches 14 has a fewer crystal defects in the epitaxial layer 13 around the trenches 14. Accordingly, the data holding characteristics are improved since the leak current from the trenches 14 becomes less. As a result of this, higher density integration is possible since the device can be made with less capacitance of capacitors.

Inventors

  • 👤 Kenji Anzai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 06:02
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10B12/30; H10B12/37; H10D; H10D1/00; H10D1/60; H10D1/62; H10D1/66; H10D1/665; H10D1/68; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/27; H10P14/271; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; Y; Y10; Y10S; Y10S148/00; Y10S148/014

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 101 words
A process for producing a semiconductor memory device having memory cells each including a transistor and a capacitor which cooperate with each other to store information, comprising the steps of: preparing a semiconductor substrate; forming an insulator film on said semiconductor substrate in a pattern; selectively epitaxially growing a semiconductor material on said semiconductor substrate using said insulator film as a mask for growth to form an epitaxial layer for relatively forming a trench having said insulator film as a bottom and end surface of said epitaxial layer as a sidewall; and forming said capacitor on the sidewall of said trench.
Claim 2
Dependent Claim 101 words
A process for producing a semiconductor memory device having memory cells each including a transistor and a capacitor which cooperate with each other to store information, comprising the steps of: preparing a semiconductor substrate; forming an insulator film on said semiconductor substrate in a pattern; selectively epitaxially growing a semiconductor material on said semiconductor substrate using said insulator film as a mask for growth to form an epitaxial layer for relatively forming a trench having said insulator film as a bottom and end surface of said epitaxial layer as a sidewall; and forming said capacitor on the sidewall of said trench.
Claim 3
Dependent Claim 150 words
A process for producing a semiconductor memory device having memory cells each including a transistor and a capacitor which cooperate with each other to store information, comprising the steps of: preparing a semiconductor substrate; forming a first insulator film on said semiconductor substrate in a pattern; selectively epitaxially growing a semiconductor material on said semiconductor substrate using said insulator film as a mask for growth to form an epitaxial layer for relatively forming a trench having said first insulator film as a bottom and end surface of said epitaxial layer as a sidewall; forming said capacitor on the sidewall of said trench, forming a charge storage node of said capacitor by introducing impurities into the sidewall portion of said trench; covering the sidewall of said trench with a second insulator film; an forming on said second insulator film, an electrically conductive film acting as an opposite electrode of said capacitor.
Claim 4
Dependent Claim 150 words
A process for producing a semiconductor memory device having memory cells each including a transistor and a capacitor which cooperate with each other to store information, comprising the steps of: preparing a semiconductor substrate; forming a first insulator film on said semiconductor substrate in a pattern; selectively epitaxially growing a semiconductor material on said semiconductor substrate using said insulator film as a mask for growth to form an epitaxial layer for relatively forming a trench having said first insulator film as a bottom and end surface of said epitaxial layer as a sidewall; forming said capacitor on the sidewall of said trench, forming a charge storage node of said capacitor by introducing impurities into the sidewall portion of said trench; covering the sidewall of said trench with a second insulator film; an forming on said second insulator film, an electrically conductive film acting as an opposite electrode of said capacitor.

References Cited (Backward Citations)

US5026658A Cited
JPS63253660A Cited
US4843025A Cited
JPH01105567A Cited
US5106776A Cited
JPH02111062A Cited
US5185282A Cited
US5236863A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-03-07 1997-09-06 1998-03-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-03-07 2001-09-06 2002-03-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-03-07 2005-09-06 2006-03-08 $7700.00 Window Closed / Lapsed

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