Process for forming self-aligned titanium silicide by heating in an oxygen rich environment

Claim 2

A process for producing a semiconductor device comprising: providing a silicon substrate; forming silicon electrode and oxide insulator regions on said substrate; forming a metal layer overlying said electrode and insulator regions; heating said device in an oxygen rich environment to form metal silicide overlying said electrode regions and to form metal oxide overlying said insulator regions ad metal silicide; and forming an electrically insulating layer over said metal oxide.

Claim 3

The process of claim 1 wherein said electrode regions include doped source and drain regions in said substrate and a polysilicon gate region separated from said substrate by a gate oxide layer.

Claim 4

The process of claim 2 wherein said insulator regions include spacer regions adjacent to sidewalls of said gate region.

Claim 5

The process of claim 3 wherein said electrode regions further include lightly doped source and drain regions in said substrate below said spacer regions.

Claim 6

The process of claim 4 wherein said metal silicide reduces electrical resistance of said electrodes and said metal oxide metal electrically insulates the underlying metal silicide.

Claim 7

The process of claim 1 wherein said device is heated to a temperature higher than 580 degrees C.

Claim 8

The process of claim 1 wherein said metal is a transition metal.

Claim 9

The process of claim 7 wherein said transition metal is titanium, cobalt, platinum, palladium, molybdenum, tantalum or nickel.

Claim 10

The process of claim 8 further comprising: opening windows in said insulating layer and metal oxide; and forming metal in said windows to provide electrical contact to said metal silicide.

Claim 11

A process for producing a semiconductor device comprising: providing a silicon substrate; forming doped source and drain regions in said substrate, a polysilicon gate region separated rom said substrate by a gate oxide layer, insulating spacer regions adjacent to sidewalls of said gate region, and lightly doped source and drain regions in said substrate below said spacer regions; forming a titanium layer overlying said source, drain, gate and sidewall regions; heating said device above 580 degrees C. in an oxygen rich environment to form titanium silicide overlying said source, drain and gate regions thereby reducing their electrical resistance, and to form titanium oxide overlying said spacer regions and titanium silicide thereby electrically insulating the underlying titanium silicide; forming an electrically insulating layer over said titanium oxide; opening windows in said insulating layer and titanium oxide; and forming metal in said windows to provide electrical contact to said titanium silicide.

Claim 12

A process for producing a semiconductor device comprising: providing a silicon substrate; forming doped source and drain regions in said substrate, a polysilicon gate region separated rom said substrate by a gate oxide layer, insulating spacer regions adjacent to sidewalls of said gate region, and lightly doped source and drain regions in said substrate below said spacer regions; forming a titanium layer overlying said source, drain, gate and sidewall regions; heating said device above 580 degrees C. in an oxygen rich environment to form titanium silicide overlying said source, drain and gate regions thereby reducing their electrical resistance, and to form titanium oxide overlying said spacer regions and titanium silicide thereby electrically insulating the underlying titanium silicide; forming an electrically insulating layer over said titanium oxide; opening windows in said insulating layer and titanium oxide; and forming metal in said windows to provide electrical contact to said titanium silicide.

Claim 13

A process for forming self-aligned metal silicide layers over source, drain and gate regions of a MOS semiconductor device comprising: providing a silicon substrate; forming field oxide regions to bound said source, drain and gate regions; forming a gate oxide on said substrate; forming a polysilicon gate region on said gate oxide; lightly doping said substrate underlying said gate oxide and between said gate and field oxide regions to define low dopant drain/source (LDD) regions and to define said source and drain regions; forming spacer oxide regions on the sidewalls of said gate region and overlying said LDD regions, removing said gate oxide adjacent said sidewalls and overlying said source and drain regions, and further doping said source and drain regions; depositing a metal layer on said device; and heating said device in an oxygen rich environment to form metal silicide overlying said source, drain and gate regions and to form metal oxide overlying said metal silicide and said field and spacer oxide regions; and forming an electrically insulating layer over said metal oxide.

Claim 14

A process for forming self-aligned metal silicide layers over source, drain and gate regions of a MOS semiconductor device comprising: providing a silicon substrate; forming field oxide regions to bound said source, drain and gate regions; forming a gate oxide on said substrate; forming a polysilicon gate region on said gate oxide; lightly doping said substrate underlying said gate oxide and between said gate and field oxide regions to define low dopant drain/source (LDD) regions and to define said source and drain regions; forming spacer oxide regions on the sidewalls of said gate region and overlying said LDD regions, removing said gate oxide adjacent said sidewalls and overlying said source and drain regions, and further doping said source and drain regions; depositing a metal layer on said device; and heating said device in an oxygen rich environment to form metal silicide overlying said source, drain and gate regions and to form metal oxide overlying said metal silicide and said field and spacer oxide regions; and forming an electrically insulating layer over said metal oxide.

Claim 15

The process of claim 11 wherein said device is heated to a temperature higher than 580 degrees C.

Claim 16

The process of claim 12 wherein said metal is a transition metal.

Claim 17

The process of claim 13 wherein said transition metal is titanium, cobalt, platinum, palladium, molybdenum, tantalum or nickel.

Claim 18

The process of claim 14 further comprising: opening windows in said insulating layer and metal oxide; and forming metal in said windows to provide electrical contact to said metal silicide.

Claim 19

A process for producing a semiconductor device comprising: forming a metal layer over silicon and insulator regions; heating said layer in an oxygen rich environment to form: metal silicide over said silicon region; and metal oxide over said insulator region and metal silicide; and selectively removing some but not all of the metal oxide which is over said metal silicide.

Claim 20

A process for producing a semiconductor device comprising: forming a metal layer over silicon and insulator regions; heating said layer in an oxygen rich environment to form: metal silicide over said silicon region; and metal oxide over said insulator region and metal silicide; and selectively removing some but not all of the metal oxide which is over said metal silicide.

Claim 21

The process of claim 16 wherein said metal is titanium.