Patent US5282164A successfully refreshed from Google Patents.
US5282164A
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US
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Programmable integrated circuit
Assignee: Kawasaki Microelectronics Inc
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Filing: 1991-11-25
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Granted: 1994-01-25
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Expires: 2011-11-25
Abstract
Abstract A programmable integrated circuit of the present invention can change the input system of serial/parallel input-parallel output circuit for program data from serial to parallel or vice versa in response to a control signal from control signal input. Therefore, a program can be written at a relatively low speed through the parallel output of serial input, and a program can be written at a relatively high speed by inputting data in parallel and outputting the input data in parallel. Moreover, the bit width of the aforementioned serial/parallel input-parallel output circuit can be changed in response to a control signal from control signal input, whereby bit width for data input, shift and the like can be optimized according to the quantity of programs to be written with the result of improved freedom of users and the reduced time required for writing a large quantity of programs.
Inventors
- 👤 Keiichi Kawana
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 16:24
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17704
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
164 words
A programmable integrated circuit comprising: a programmable logic device comprising programmable logic elements disposed in an array on which programming data can be written; write means for writing said programming data on said programmable logic device, comprising: serial input means for inputting one-bit serial data, parallel input means for inputting at least one multiple-bit parallel data, and means for selecting one of said serial input means or said parallel input means; and means for inputting a control signal into the selection means for selecting one of said serial input means or said parallel input means; wherein said selection means selects one of said serial input means or said parallel input means in response to the control signal, and wherein said programming data write means comprises: a first shift register for outputting temporarily written data in parallel to a bit line of said programmable logic device, and a second shift register for outputting the serially input one-bit serial data in parallel to a word line.
Claim 2
Dependent Claim
164 words
A programmable integrated circuit comprising: a programmable logic device comprising programmable logic elements disposed in an array on which programming data can be written; write means for writing said programming data on said programmable logic device, comprising: serial input means for inputting one-bit serial data, parallel input means for inputting at least one multiple-bit parallel data, and means for selecting one of said serial input means or said parallel input means; and means for inputting a control signal into the selection means for selecting one of said serial input means or said parallel input means; wherein said selection means selects one of said serial input means or said parallel input means in response to the control signal, and wherein said programming data write means comprises: a first shift register for outputting temporarily written data in parallel to a bit line of said programmable logic device, and a second shift register for outputting the serially input one-bit serial data in parallel to a word line.
Claim 3
Dependent Claim
31 words
The programmable integrated circuit of claim 1, wherein said selection means changes the bit width of the input data in response to the control signal from said control signal input means.
Claim 4
Dependent Claim
38 words
The programmable integrated circuit of claim 2, wherein said selection means changes the bit width of the input data between one bit and at least one of 4 bits, 8 bits, 16 bits, 32 bits and 64 bits.
Claim 5
Dependent Claim
28 words
The programmable integrated circuit of claim 1, wherein said selection means is a bi-state selector for selecting one of said serial input means or said parallel input means.
Claim 6
Dependent Claim
151 words
A programmable integrated circuit comprising: a programmable logic device comprising programmable logic elements disposed in an array on which programming data can be written; write means for writing said programming data on said programmable logic device, comprising: serial input means for inputting one-bit serial data, parallel input means for inputting at least one multiple-bit parallel data, and means for selecting one of said serial input means or said parallel input means; and means for inputting a control signal into the selection means for selecting one of said serial input means or said parallel input means; wherein said selection means selects one of said serial input means or said parallel input means in response to the control signal and comprises a tri-state selector for selecting one of said serial input means, said parallel input means having a first parallel data bit-width and said parallel input means having a second parallel data bit-width.
Claim 7
Dependent Claim
151 words
A programmable integrated circuit comprising: a programmable logic device comprising programmable logic elements disposed in an array on which programming data can be written; write means for writing said programming data on said programmable logic device, comprising: serial input means for inputting one-bit serial data, parallel input means for inputting at least one multiple-bit parallel data, and means for selecting one of said serial input means or said parallel input means; and means for inputting a control signal into the selection means for selecting one of said serial input means or said parallel input means; wherein said selection means selects one of said serial input means or said parallel input means in response to the control signal and comprises a tri-state selector for selecting one of said serial input means, said parallel input means having a first parallel data bit-width and said parallel input means having a second parallel data bit-width.
Claim 8
Dependent Claim
158 words
A programmable integrated circuit having programmable logic elements to which programming data can be written, comprising: programming data write means for writing the programming data to the programmable integrated circuit, comprising output means for outputting in parallel one of serial input data and parallel input data and capable of changing an input bit width of the input data, a first shift register for outputting temporarily written data in parallel to a bit line of said programmable logic device, and a second shift register for outputting the serially input one-bit serial data in parallel to a word line; and control signal input means for inputting a control signal to said output means; wherein one of the serial input data and the parallel input data is selected for said output means in response to the control signal from said control signal input means, and the input bit width of said output means is changed in response to said control signal.
Claim 9
Dependent Claim
158 words
A programmable integrated circuit having programmable logic elements to which programming data can be written, comprising: programming data write means for writing the programming data to the programmable integrated circuit, comprising output means for outputting in parallel one of serial input data and parallel input data and capable of changing an input bit width of the input data, a first shift register for outputting temporarily written data in parallel to a bit line of said programmable logic device, and a second shift register for outputting the serially input one-bit serial data in parallel to a word line; and control signal input means for inputting a control signal to said output means; wherein one of the serial input data and the parallel input data is selected for said output means in response to the control signal from said control signal input means, and the input bit width of said output means is changed in response to said control signal.
Claim 10
Dependent Claim
149 words
A programmable integrated circuit, comprising: programming data write means for writing programming data to the programmable integrated circuit, wherein said programming data write means comprises a first-shift register for outputting serially input one-bit data in parallel to a word line and a second shift register for parallel output of data to a bit line, having a selector for selecting one of serial input data and parallel input data and for changing the bit width of data, the programmable integrated circuit further comprises control signal input means for inputting a control signal into said selector, connected to a control input terminal of the selector of said second shift register, and said selector of said second shift register selects one of the serial input data and the parallel input data to change the bit width of the input data in response to the control signal from said control signal input means.
Claim 11
Dependent Claim
149 words
A programmable integrated circuit, comprising: programming data write means for writing programming data to the programmable integrated circuit, wherein said programming data write means comprises a first-shift register for outputting serially input one-bit data in parallel to a word line and a second shift register for parallel output of data to a bit line, having a selector for selecting one of serial input data and parallel input data and for changing the bit width of data, the programmable integrated circuit further comprises control signal input means for inputting a control signal into said selector, connected to a control input terminal of the selector of said second shift register, and said selector of said second shift register selects one of the serial input data and the parallel input data to change the bit width of the input data in response to the control signal from said control signal input means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-01-24 | 1997-07-26 | 1998-01-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-01-24 | 2001-07-26 | 2002-01-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-01-24 | 2005-07-26 | 2006-01-25 | $7700.00 | Window Closed / Lapsed |