Dynamic memory with group bit lines and associated bit line group selector

Claim 1

A dynamic memory, comprising: a) a memory array having a plurality of memory cells; b) a plurality of bit lines divided into a plurality of bit line groups; c) a plurality of word lines each associated with a number of said plurality of memory cells, for selecting for reading and refreshing said number of memory cells; d) a decoder for individually selecting said word lines; e) a register, having a number of bits which is fewer than the number of memory cells associated with each word line and which is the same as the number of bit lines of one of the plurality of bit line groups, for receiving outputs from memory cells corresponding to a selected one of said bit line groups; and f) a bit line group selector, disposed between the memory cell array and the register, for transferring signals between bit lines of the selected one of the bit line groups and respective bits of the register, the bit line group selector sequentially accessing all of said bit line groups each time a word line has been selected, whereby a refreshing operation is carried out for all memory cells of each selected word line.