Integrating photosensor and imaging system having wide dynamic range with varactors

Claim 2

An integrating imaging array disposed on a single piece of semiconductor substrate material, including: a plurality of integrating photosensors arranged in an array of rows and columns, each of said photosensors comprising a bipolar phototransistor having a collector connected to a fixed voltage source, an emitter connected to a sense node, and a base connected to one end of a capacitor, the other end of said capacitor connected to a select node; a plurality of row lines, a unique one of said row lines associated with each particular row in said array, all of the select nodes of the integrating photosensors in a single one of said rows connected to the unique one of said row lines associated therewith; a plurality of sense lines, a unique one of said sense lines associated with each particular column in said array, all of the sense nodes of the integrating photosensors in a single one of said columns connected to the unique one of said sense lines associated therewith; and a plurality of sense amplifiers, each of said sense amplifiers having an inverting input and an output, the input of one of said sense amplifiers connected to each of said sense lines, each of said sense amplifiers further includes a varactor element connected between its said inverting input and its said output.

Claim 3

The integrated imaging array of claim 1 wherein said varactor element of each of said sense amplifiers comprises an MOS transistor having its gate connected to said inverting input of said sense amplifier and its source and drain connected to said output of said sense amplifier.

Claim 4

The integrated imaging array of claim 1 wherein said varactor element of each of said sense amplifiers comprises an MOS transistor having its gate connected to said output of said sense amplifier and its source and drain connected to said inverting input of said sense amplifier.

Claim 5

The integrated imaging array of claim 1 wherein each of said sense amplifiers further includes means for selectively connecting its said output to its said input.

Claim 6

The integrating imaging array of claim 4 wherein said means for selectively connecting comprises an MOS transistor connected between said input node and said output node, said MOS transistor having its gate connected to a balance input node.

Claim 7

The integrated imaging array of claim 1, further including: means for selecting one of said rows; and means for adapting said sense amplifier to a known state when none of said rows is selected.

Claim 8

An integrating imaging array disposed on a single piece of semiconductor substrate material, including: a plurality of integrating photosensors arranged in a matrix including a plurality of rows and columns, each of said integrating photosensors including an integrating photosensitive element, a sense node, and an enable node, a semiconductor switch connected between said integrating photosensitive element and said sense node, said semiconductor switch having a control input connected to said enable node; a plurality of row lines, a unique one of said row lines associated with each particular row in said array, the enable nodes of all of said integrating photosensors associated with said particular row connected to said unique one of said row lines; a plurality of sense lines, a unique one of said sense lines associated with each particular column in said array, the sense nodes of all of said integrating photosensors associated with said particular column connected to said unique one of said column lines; and a plurality of sense amplifiers, each of said sense amplifiers having an inverting input and an output, the input of one of said sense amplifiers connected to each of said sense lines, each of said sense amplifiers further including a varactor element connected between its said inverting input and is said output.

Claim 9

An integrating imaging array disposed on a single piece of semiconductor substrate material, including: a plurality of integrating photosensors arranged in a matrix including a plurality of rows and columns, each of said integrating photosensors including an integrating photosensitive element, a sense node, and an enable node, a semiconductor switch connected between said integrating photosensitive element and said sense node, said semiconductor switch having a control input connected to said enable node; a plurality of row lines, a unique one of said row lines associated with each particular row in said array, the enable nodes of all of said integrating photosensors associated with said particular row connected to said unique one of said row lines; a plurality of sense lines, a unique one of said sense lines associated with each particular column in said array, the sense nodes of all of said integrating photosensors associated with said particular column connected to said unique one of said column lines; and a plurality of sense amplifiers, each of said sense amplifiers having an inverting input and an output, the input of one of said sense amplifiers connected to each of said sense lines, each of said sense amplifiers further including a varactor element connected between its said inverting input and is said output.

Claim 10

The integrated imaging array of claim 7 wherein said varactor element of each of said sense amplifiers comprises an MOS transistor having its gate connected to said inverting input of said sense amplifier and its source and drain connected to said output of said sense amplifier.

Claim 11

The integrated imaging array of claim 7 wherein said varactor element of each of said sense amplifiers comprises an MOS transistor having its gate connected to said output of said sense amplifier and its source and drain connected to said inverting input of said sense amplifier.

Claim 12

The integrated imaging array of claim 7 wherein each of said sense amplifiers further includes means for selectively connecting its said output to its said inverting input.

Claim 13

The integrating imaging array of claim 10 wherein said means for selectively connecting comprises an MOS transistor connected between said input node and said output node, said MOS transistor having its gate connected to a balance input node.

Claim 14

The integrated imaging array of claim 7, further including: means for selecting one of said rows; and means for adapting said amplifier to a known state when no one of said rows is selected.

Claim 15

The integrating imaging array of claim 7 wherein each of said integrating photosensors comprises a bipolar phototransistor having a base, an emitter, and a collector, said collector connected to a voltage source, and said emitter connected to said semiconductor switch.

Claim 16

The integrating imaging array of claim 7 wherein each of said integrating photosensors comprises a photodiode.

Claim 17

An integrating imaging array disposed on a single piece of semiconductor substrate material of a first conductivity type, including: a plurality of integrating photosensors disposed in a well of a second conductivity type opposite to said first conductivity type, said plurality of integrating photosensors arranged in a matrix including a plurality of rows and columns, each of said photosensors comprising a bipolar phototransistor having a collector region formed by said well, a base region formed from a region of said first conductivity type disposed in said well, and an emitter region formed from a region of said second conductivity type disposed in said base region, said well connected to a voltage source; a capacitor dielectric layer formed over said base regions of said bipolar phototransistors; a plurality of row lines, a unique one of said row lines associated with each one of said rows in said array, each of said row lines comprising a conductive strip disposed over said capacitor dielectric layer in a region lying over a portion of the base regions of the ones of said bipolar phototransistors in the one of said rows with which it is associated, each of said strips including a plurality of first-sized apertures therein, each of said apertures extending through said capacitor dielectric and substantially self aligned with the emitter region of a different one of said bipolar phototransistors, said strips, said capacitor dielectric layer and said base regions acting to capacitively couple said base regions of the ones of said bipolar phototransistors associated with each of said corresponding rows to the unique one of said row lines associated therewith; an insulating layer covering said polysilicon strips, said insulating layer including a plurality of second-sized contact apertures therein, said second-sized contact apertures substantially aligned with said first-sized apertures and extending through said insulating layer to said emitter regions, said second-sized contact apertures being sized smaller than sad first-sized apertures so as to prevent contact to said conductive strips; and a plurality of conductive sense lines disposed over said second insulating layer and disposed in a direction generally orthogonal to said conductive strips, a unique one of said sense lines associated with each of said columns in said array, the emitters of all of the ones of said integrating photosensors in each column connected to the unique one of said sense line with which that column is associated through ones of said second-sized contact apertures; a plurality of sense amplifiers, each of said sense amplifiers having an inverting input and an output, the input of one of said sense amplifiers connected to each of said sense lines, each of said sense amplifiers further including a varactor element connected between its said inverting input and its said output.

Claim 18

An integrating imaging array disposed on a single piece of semiconductor substrate material of a first conductivity type, including: a plurality of integrating photosensors disposed in a well of a second conductivity type opposite to said first conductivity type, said plurality of integrating photosensors arranged in a matrix including a plurality of rows and columns, each of said photosensors comprising a bipolar phototransistor having a collector region formed by said well, a base region formed from a region of said first conductivity type disposed in said well, and an emitter region formed from a region of said second conductivity type disposed in said base region, said well connected to a voltage source; a capacitor dielectric layer formed over said base regions of said bipolar phototransistors; a plurality of row lines, a unique one of said row lines associated with each one of said rows in said array, each of said row lines comprising a conductive strip disposed over said capacitor dielectric layer in a region lying over a portion of the base regions of the ones of said bipolar phototransistors in the one of said rows with which it is associated, each of said strips including a plurality of first-sized apertures therein, each of said apertures extending through said capacitor dielectric and substantially self aligned with the emitter region of a different one of said bipolar phototransistors, said strips, said capacitor dielectric layer and said base regions acting to capacitively couple said base regions of the ones of said bipolar phototransistors associated with each of said corresponding rows to the unique one of said row lines associated therewith; an insulating layer covering said polysilicon strips, said insulating layer including a plurality of second-sized contact apertures therein, said second-sized contact apertures substantially aligned with said first-sized apertures and extending through said insulating layer to said emitter regions, said second-sized contact apertures being sized smaller than sad first-sized apertures so as to prevent contact to said conductive strips; and a plurality of conductive sense lines disposed over said second insulating layer and disposed in a direction generally orthogonal to said conductive strips, a unique one of said sense lines associated with each of said columns in said array, the emitters of all of the ones of said integrating photosensors in each column connected to the unique one of said sense line with which that column is associated through ones of said second-sized contact apertures; a plurality of sense amplifiers, each of said sense amplifiers having an inverting input and an output, the input of one of said sense amplifiers connected to each of said sense lines, each of said sense amplifiers further including a varactor element connected between its said inverting input and its said output.

Claim 19

The integrating imaging array of claim 15 further including a plurality of sense amplifiers, each of said sense amplifiers having an input and an output, the input of one of said sense amplifiers connected to each of said sense lines.

Claim 20

The integrating imaging array of claim 16, wherein the input of each of said sense amplifiers is an inverting input and wherein each of said sense amplifiers further includes a varactor element connected between its said inverting input and its said output.

Claim 21

The integrated imaging array of claim 15 wherein said varactor element of each of said sense amplifiers comprises an MOS transistor having its gate connected to said inverting input of said sense amplifier and its source and drain connected to said output of said sense amplifier.

Claim 22

The integrated imaging array of claim 15 wherein said varactor element of each of said sense amplifiers comprises an MOS transistor having its gate connected to said output of said sense amplifier and its source and drain connected to said inverting input of said sense amplifier.

Claim 23

The integrated imaging array of claim 15 wherein each of said sense amplifiers further includes means for selectively connecting its output to its inverting input.

Claim 24

The integrating imaging array of claim 20 wherein said means for selectively connecting comprises an MOS transistor connected between said input node and said output node, said MOS transistor having its gate connected to a balance input node.

Claim 25

The integrated imaging array of claim 15, further including: means for selecting one of said rows; and means for adapting said amplifier to a known state when none of said rows is selected.

Claim 26

The integrated imaging array of claim 15, further including: means for serially selecting each of said rows in order; and means for serially scanning the outputs of said sense amplifiers when each of said rows has been selected.