← Back to Patent Explorer
US4907059A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor bipolar-CMOS inverter

Assignee: Toshiba Corp
•
Filing: 1988-02-05
•
Granted: 1990-03-06
•
Expires: 2008-02-05
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor device has a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type; an interconnection layer, containing an impurity of a second conductivity type, for connecting the first and second semiconductor regions; and a third semiconductor region of the second conductivity type which is formed in the first semiconductor region upon diffusion of the impurity from the interconnection layer to the first semiconductor region, the first and third semiconductor regions being adapted to form a p-n junction diode.

Inventors

  • 👤 Kiyoshi Kobayashi
  • 👤 Kiyofumi Ochii
  • 👤 Tatsuya Inatsuki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 01:22
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D84/403; H10D84/406; H10B; H10B10/00; H10D88/00; H10P; H10P32/00; H10P32/10; H10P32/14; H10W; H10W20/00; H10W20/01; H10W20/40; H10W20/41; H10W20/44; H10W20/4451

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 118 words
A semiconductor device comprising: a first semiconductor region of a first conductivity type, said first semiconductor region constituting a drain region of a metal-oxide-semiconductor transistor and a base region of a first bipolar transistor; a second semiconductor region of a second conductivity type, said second semiconductor region constituting a collector region of a second bipolar transistor; an interconnection layer, containing an impurity of said second semiconductor type, for connecting said first and second semiconductor regions; and a third semiconductor region of said second semiconductor type formed in said first semiconductor region upon diffusion of the impurity from said interconnection layer to said first semiconductor region, said third semiconductor region constituting an emitter region of said first bipolar transistor.
Claim 2
Dependent Claim 118 words
A semiconductor device comprising: a first semiconductor region of a first conductivity type, said first semiconductor region constituting a drain region of a metal-oxide-semiconductor transistor and a base region of a first bipolar transistor; a second semiconductor region of a second conductivity type, said second semiconductor region constituting a collector region of a second bipolar transistor; an interconnection layer, containing an impurity of said second semiconductor type, for connecting said first and second semiconductor regions; and a third semiconductor region of said second semiconductor type formed in said first semiconductor region upon diffusion of the impurity from said interconnection layer to said first semiconductor region, said third semiconductor region constituting an emitter region of said first bipolar transistor.
Claim 3
Dependent Claim 14 words
A semiconductor device according to claim 1 wherein said interconnection layer comprises polycrystalline silicon.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-03-05 1993-09-04 1994-03-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-03-05 1997-09-04 1998-03-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-03-05 2001-09-04 2002-03-06 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag