US5260228A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making a semiconductor device having a charge transfer device, MOSFETs, and bipolar transistors
Assignee: Toshiba Corp
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Filing: 1992-11-17
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Granted: 1993-11-09
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Expires: 2012-11-17
Abstract
Abstract A semiconductor device having a semiconductor substrate of a first conductivity type, an epitaxial layer of a second conductivity type formed on a major surface of the semiconductor substrate, an isolation layer of the first conductivity type formed in the epitaxial layer and extending from a surface thereof to the major surface of the semiconductor substrate. The isolation layer divides the epitaxial layer into first, second, and third islands. The device further has two wells of the first conductivity type, formed in the first and second islands, respectively, and extending to the substrate, a charge transfer device having a back gate formed of the first well, an insulated-gate FET of the first conductivity type, having a back gate formed of the second island, an insulated-gate FET of the second conductivity type, having a back gate formed of the second well, and a bipolar transistor having a collector formed of the third island. The first island surrounds the first well which serves as back gate of the charge transfer device, and thus blocks the noise generated in the first well. Hence, the other islands are free from the influence of the noise.
Inventors
- 👤 Minoru Taguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 09:38
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D84/891
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
249 words
A method of manufacturing semiconductor device comprising the steps of: preparing a semiconductor substrate of a first conductivity type having a major surface; forming an epitaxial layer of a second conductivity type on the major surface of the semiconductor substrate, the epitaxial layer having a top surface; forming an isolation layer of the first conductivity type in the epitaxial layer, the isolation layer extending from the top surface of the epitaxial layer to the major surface of the semiconductor substrate and dividing the epitaxial layer into first, second and third islands; forming a first semiconductor region of the first conductivity type in the first island, the first semiconductor region extending to the major surface of the semiconductor substrate; forming a second semiconductor region of the first conductivity type in the second island, the second semiconductor region extending to the major surface of the semiconductor substrate; forming a charge transfer device in the first semiconductor region, the charge transfer device having a back gate formed of the first semiconductor region; forming a first insulated gate FET of the first conductivity type in the second island, the first insulated gate FET having a back gate formed of the second island; forming a second insulated gate FET of the second conductivity type in the second semiconductor region, the second insulated gate FET having a back gate formed of the second semiconductor region, and forming a bipolar transistor in the third island, the bipolar transistor having a collector formed of the third island.
Claim 2
Independent Claim
249 words
A method of manufacturing semiconductor device comprising the steps of: preparing a semiconductor substrate of a first conductivity type having a major surface; forming an epitaxial layer of a second conductivity type on the major surface of the semiconductor substrate, the epitaxial layer having a top surface; forming an isolation layer of the first conductivity type in the epitaxial layer, the isolation layer extending from the top surface of the epitaxial layer to the major surface of the semiconductor substrate and dividing the epitaxial layer into first, second and third islands; forming a first semiconductor region of the first conductivity type in the first island, the first semiconductor region extending to the major surface of the semiconductor substrate; forming a second semiconductor region of the first conductivity type in the second island, the second semiconductor region extending to the major surface of the semiconductor substrate; forming a charge transfer device in the first semiconductor region, the charge transfer device having a back gate formed of the first semiconductor region; forming a first insulated gate FET of the first conductivity type in the second island, the first insulated gate FET having a back gate formed of the second island; forming a second insulated gate FET of the second conductivity type in the second semiconductor region, the second insulated gate FET having a back gate formed of the second semiconductor region, and forming a bipolar transistor in the third island, the bipolar transistor having a collector formed of the third island.
Claim 3
Dependent Claim
27 words
The method of manufacturing a semiconductor device according to claim 1, wherein the isolation layer, the first semiconductor region and the second semiconductor region are formed simultaneously.
Claim 4
Dependent Claim
43 words
The method of manufacturing a semiconductor device according to claim 2, wherein the isolation layer, the first semiconductor region and the second semiconductor region are formed by injecting impurity ions of the first conductivity type into the epitaxial layer and by thermal diffusion.
Claim 5
Dependent Claim
69 words
The method of manufacturing a semiconductor device according to claim 1 further comprising the steps of: forming a first buried layer of the second conductivity type in the major surface of the semiconductor substrate; forming a second buried layer of the second conductivity type in the major surface of the semiconductor substrate after the step of preparing the semiconductor substrate and before the step of forming the epitaxial layer.
Claim 6
Dependent Claim
35 words
The method of manufacturing a semiconductor device according to claim 4, wherein the second island is formed to include the first buried layer and the third island is formed to include the second buried layer.
Claim 7
Dependent Claim
24 words
The method of manufacturing a semiconductor device according to claim 5, wherein the first buried layer and the second buried layer are formed simultaneously.
Claim 8
Dependent Claim
40 words
The method of manufacturing a semiconductor device according to claim 6, wherein the first buried layer and the second buried layer are respectively formed by diffusing impurities of the second conductivity type on the major surface of said semiconductor substrate.
Claim 9
Dependent Claim
70 words
The method of manufacturing a semiconductor device according to claim 4 further comprising the steps of: forming a third semiconductor region of the second conductivity type with an impurity concentration higher than an impurity concentration of the epitaxial layer in the third island, the third semiconductor region extending to the second buried layer after the step of forming the epitaxial layer and before the step of forming the isolation layer.
Claim 10
Dependent Claim
70 words
The method of manufacturing a semiconductor device according to claim 8, further comprising the steps of: forming a third buried layer of the first conductivity type in the major surface of the semiconductor substrate; forming a fourth buried layer of the first conductivity type in the major surface of said semiconductor substrate after the step of forming the second buried layer and before the step of forming the epitaxial layer.
Claim 11
Dependent Claim
37 words
The method of manufacturing a semiconductor device according to claim 9, wherein the isolation layer is formed on the third buried layer and the second semiconductor region is formed so as to include the fourth buried layer.
Claim 12
Dependent Claim
24 words
The method of manufacturing a semiconductor device according to claim 10, wherein the third buried layer and the fourth buried layer are formed simultaneously.
Claim 13
Dependent Claim
44 words
The method of manufacturing a semiconductor device according to claim 11, wherein the third buried layer and the fourth buried layer are respectively formed by injecting impurities of the first conductivity type on the major surface of the semiconductor substrate and by thermal diffusion.
References Cited (Backward Citations)
US4314857A
Cited
US4484388A
Cited
US4646124A
Cited
US4642877A
Cited
EP0245515A1
Cited
EP0242748A1
Cited
US4764482A
Cited
US4859624A
Cited
EP0392536A2
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1996-11-08 | 1997-05-10 | 1997-11-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-11-08 | 2001-05-10 | 2001-11-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-11-08 | 2005-05-10 | 2005-11-09 | $7700.00 | Window Closed / Lapsed |