Patent US5254881A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5254881A Expired / Lapsed US ⏱️ 0.0 years remaining

Master-slave peak detector

Assignee: Nokia Bell Labs
•
Filing: 1991-09-16
•
Granted: 1993-10-19
•
Expires: 2011-09-16
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A peak detector for rapidly following the peak voltage of a pulsed input signal without significant droop between pulses. The peak detector has a master section which selectively controls the droop rate of a slave section. The output of the slave section is the output of the peak detector. The master section droop is determined by a resistor, which may be disconnected therefrom to hold the peak of the input signal.

Inventors

  • 👤 Robert H. Leonowich

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 11:11
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/153; H03K5/1532; G; G01; G01R; G01R19/00; G01R19/04

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 107 words
A peak detector having a first capacitor, formed in an integrated circuit and responsive to an input signal, for holding the peak of the input signal across the first capacitor, characterized by: a second capacitor; a switch, responsive to the input signal, for selectively coupling the second capacitor to the first capacitor; wherein the switch includes a comparator and an FET, the comparator being responsive to the input signal and the voltage on the second capacitor, and the FET coupling the first capacitor to the second capacitor in response to the comparator when the input signal differs a predetermined amount from the voltage on the second capacitor.
Claim 2
Dependent Claim 107 words
A peak detector having a first capacitor, formed in an integrated circuit and responsive to an input signal, for holding the peak of the input signal across the first capacitor, characterized by: a second capacitor; a switch, responsive to the input signal, for selectively coupling the second capacitor to the first capacitor; wherein the switch includes a comparator and an FET, the comparator being responsive to the input signal and the voltage on the second capacitor, and the FET coupling the first capacitor to the second capacitor in response to the comparator when the input signal differs a predetermined amount from the voltage on the second capacitor.
Claim 3
Dependent Claim 20 words
The peak detector as recited in claim 1, further characterized by: means for changing the voltage on the second capacitor.
Claim 4
Dependent Claim 14 words
The peak detector as recited in claim 2, wherein the means is a resistor.
Claim 5
Dependent Claim 20 words
The peak detector as recited in claim 1, wherein the switch is an FET having a substantially zero voltage threshold.
Claim 6
Dependent Claim 117 words
A peak detector having a first capacitor, formed in an integrated circuit and responsive to an input signal, for holding the peak of the input signal across the first capacitor, characterized by: a second capacitor; means for changing a voltage on the second capacitor; and a switch, responsive to the input signal and connected between the first capacitor and the second capacitor, for coupling the first capacitor to the second capacitor when the input signal differs a predetermined amount from the voltage on the second capacitor; wherein the first capacitor is decoupled from the second capacitor and the voltage on the first capacitor is independent of the second capacitor voltage unless the switch so couples the capacitors.
Claim 7
Dependent Claim 117 words
A peak detector having a first capacitor, formed in an integrated circuit and responsive to an input signal, for holding the peak of the input signal across the first capacitor, characterized by: a second capacitor; means for changing a voltage on the second capacitor; and a switch, responsive to the input signal and connected between the first capacitor and the second capacitor, for coupling the first capacitor to the second capacitor when the input signal differs a predetermined amount from the voltage on the second capacitor; wherein the first capacitor is decoupled from the second capacitor and the voltage on the first capacitor is independent of the second capacitor voltage unless the switch so couples the capacitors.
Claim 8
Dependent Claim 46 words
The peak detectors as recited in claim 5, wherein the switch is an FET with a source connected to the second capacitor, a drain connected to the first capacitor, and a gate having the input signal coupled thereto, the FET having a substantially zero threshold voltage.
Claim 9
Dependent Claim 14 words
The peak detector as recited in claim 6, wherein the means is a resistor.

References Cited (Backward Citations)

US3639786A Cited
US3885168A Cited
US4185211A Cited
US4389579A Cited
US4321488A Cited
US4420698A Cited
US4720643A Cited
US4613769A Cited
JPS61219871A Cited
US4987323A Cited
US5025176A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-10-18 1997-04-19 1997-10-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-10-18 2001-04-19 2001-10-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-10-18 2005-04-19 2005-10-19 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag