Patent US1774201A successfully refreshed from Google Patents.
Patent US4867338A successfully refreshed from Google Patents.
Patent US5237183A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5237183A Expired / Lapsed US ⏱️ 0.0 years remaining

High reverse voltage IGT

Assignee: Semiconductor Components Industries LLC
•
Filing: 1989-12-14
•
Granted: 1993-08-17
•
Expires: 2009-12-14
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The reverse breakdown voltage of a conventional insulated gate transistor is greatly increased by the addition of a lightly doped layer between the substrate and a buffer layer of the insulated gate transistor. The addition of the lightly doped layer does not increase the on resistance of the device, nor the cut-off time of the device. The lightly doped layer can be provided as an epitaxial layer along with the other epitaxial layers of the insulated gate transistor.

Inventors

  • 👤 Gary V. Fay
  • 👤 Bernard W. Boland

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 15:04
CPC Classifications
H; H10; H10D; H10D12/00; H10D12/411; H10D12/441; H10D62/00; H10D62/10; H10D62/13; H10D62/141; H10D62/142

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 127 words
An insulated gate transistor having a substrate of a first conductivity type and an epitaxial layer of a second conductivity type over the substrate, comprising: a buffer layer of the second conductivity type located between the substrate and the epitaxial layer; and a lightly doped layer of the first conductivity type located between the substrate and the buffer layer wherein the lightly doped layer has a dopant concentration in the range of 1×10 14 to 1×10 16 atoms/cm 3 and which is lower than the dopant concentration of the substrate and wherein the lightly doped layer increases the reverse breakdown voltage of the insulated gate transistor, wherein the buffer layer is 7 to 11 microns thick and the lightly doped layer is 5 to 200 microns thick.
Claim 2
Dependent Claim 127 words
An insulated gate transistor having a substrate of a first conductivity type and an epitaxial layer of a second conductivity type over the substrate, comprising: a buffer layer of the second conductivity type located between the substrate and the epitaxial layer; and a lightly doped layer of the first conductivity type located between the substrate and the buffer layer wherein the lightly doped layer has a dopant concentration in the range of 1×10 14 to 1×10 16 atoms/cm 3 and which is lower than the dopant concentration of the substrate and wherein the lightly doped layer increases the reverse breakdown voltage of the insulated gate transistor, wherein the buffer layer is 7 to 11 microns thick and the lightly doped layer is 5 to 200 microns thick.
Claim 3
Dependent Claim 26 words
The insulated gate transistor of claim 1 wherein the substrate has a dopant concentration in the range of 2×10 18 to 1×10 19 atoms/cm 3 .
Claim 4
Dependent Claim 27 words
The insulated gate transistor of claim 1 wherein the buffer layer has a dopant concentration in the range of 7×10 16 to 7×10 17 atoms/cm 3 .
Claim 5
Dependent Claim 197 words
An insulated gate transistor having a high reverse breakdown voltage, comprising: a substrate of a first conductivity type; a first epitaxial layer on the substrate of the first conductivity type and having a dopant concentration in the range of 1×10 14 to 1×10 16 atoms/cm 3 and which is lower than the dopant concentration of the substrate to increase the reverse breakdown voltage of the insulated gate transistor, wherein the first epitaxial layer has a thickness ranging from 5 to 200 microns; a second epitaxial layer of a second conductivity type on the first epitaxial layer to serve as a buffer layer; a third epitaxial layer of the second conductivity type on the second epitaxial layer; a base region of the first conductivity type extending into the third epitaxial layer; an emitter region of the second conductivity type extending into the base region and spaced from a periphery of the base region in order to form a channel between the emitter region and the periphery; an insulated gate positioned over the channel; an emitter electrode forming an electrical connection between the emitter region and the base region; and a collector electrode providing electrical contact to the substrate.
Claim 6
Dependent Claim 197 words
An insulated gate transistor having a high reverse breakdown voltage, comprising: a substrate of a first conductivity type; a first epitaxial layer on the substrate of the first conductivity type and having a dopant concentration in the range of 1×10 14 to 1×10 16 atoms/cm 3 and which is lower than the dopant concentration of the substrate to increase the reverse breakdown voltage of the insulated gate transistor, wherein the first epitaxial layer has a thickness ranging from 5 to 200 microns; a second epitaxial layer of a second conductivity type on the first epitaxial layer to serve as a buffer layer; a third epitaxial layer of the second conductivity type on the second epitaxial layer; a base region of the first conductivity type extending into the third epitaxial layer; an emitter region of the second conductivity type extending into the base region and spaced from a periphery of the base region in order to form a channel between the emitter region and the periphery; an insulated gate positioned over the channel; an emitter electrode forming an electrical connection between the emitter region and the base region; and a collector electrode providing electrical contact to the substrate.
Claim 7
Dependent Claim 26 words
The insulated gate transistor of claim 4 wherein the substrate has a dopant concentration in the range of 2×10 18 to 1×10 19 atoms/cm 3 .
Claim 8
Dependent Claim 146 words
An insulated gate transistor having an improved reverse breakdown voltage made from the following method, comprising the steps of: providing a semiconductor substrate of a first conductivity type; providing a layer of the first conductivity type over the substrate and having a thickness ranging from 5 to 200 microns and a dopant concentration in the range of 1×10 14 to 1×10 16 atoms/cm 3 and which is lower than the dopant concentration of the substrate and which increases the reverse breakdown voltage of the insulated gate transistor; providing a buffer layer of a second conductivity type over the layer of a first conductivity type; providing an epitaxial layer of the second conductivity type over the buffer layer; providing a first region of the first conductivity type extending into the epitaxial layer; and providing a second region of the second conductivity type extending into the first region.
Claim 9
Dependent Claim 146 words
An insulated gate transistor having an improved reverse breakdown voltage made from the following method, comprising the steps of: providing a semiconductor substrate of a first conductivity type; providing a layer of the first conductivity type over the substrate and having a thickness ranging from 5 to 200 microns and a dopant concentration in the range of 1×10 14 to 1×10 16 atoms/cm 3 and which is lower than the dopant concentration of the substrate and which increases the reverse breakdown voltage of the insulated gate transistor; providing a buffer layer of a second conductivity type over the layer of a first conductivity type; providing an epitaxial layer of the second conductivity type over the buffer layer; providing a first region of the first conductivity type extending into the epitaxial layer; and providing a second region of the second conductivity type extending into the first region.
Claim 10
Dependent Claim 116 words
An insulated gate transistor having a substrate of a first conductivity type and an epitaxial layer of a second conductivity type over the substrate, comprising: a buffer layer of the second conductivity type located between the substrate and the epitaxial layer; and a lightly doped layer of the first conductivity type located between the substrate and the buffer layer wherein the lightly doped layer has a dopant concentration lower than the dopant concentration of the substrate and wherein the lightly doped layer increases the reverse breakdown voltage of the insulated gate transistor by having a dopant concentration in the range of 1×10 14 to 1×10 16 atoms/cm 3 and a thickness of 5 to 200 microns.
Claim 11
Dependent Claim 116 words
An insulated gate transistor having a substrate of a first conductivity type and an epitaxial layer of a second conductivity type over the substrate, comprising: a buffer layer of the second conductivity type located between the substrate and the epitaxial layer; and a lightly doped layer of the first conductivity type located between the substrate and the buffer layer wherein the lightly doped layer has a dopant concentration lower than the dopant concentration of the substrate and wherein the lightly doped layer increases the reverse breakdown voltage of the insulated gate transistor by having a dopant concentration in the range of 1×10 14 to 1×10 16 atoms/cm 3 and a thickness of 5 to 200 microns.

References Cited (Backward Citations)

JPS5214377A Cited
US4364073A Cited
JPS57139963A Cited
US5068704A Cited
US5031009A Cited
US4920062A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-08-16 1997-02-15 1997-08-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-08-16 2001-02-15 2001-08-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-08-16 2005-02-15 2005-08-17 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag