US5031009A
Expired / Lapsed
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Conductivity modulation semiconductor with no negative resistance characteristics
Assignee: Fuji Electric Co Ltd
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Filing: 1988-08-09
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Granted: 1991-07-09
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Expires: 2008-08-09
Abstract
Abstract A conductivity modulation type Metal-Oxide Semiconductor Field Effect Transistor is disclosed having no negative resistance characteristics and which can withstand a high voltage and operate at a high speed. The semiconductor is constructed with a low density intermediate layer between a buffer layer and the silicon substrate. The density of the intermediate layer, lower than adjacent layers, induces minority carrier injection across the buffer layer thereby eliminating the negative resistance characteristic.
Inventors
- 👤 Tatsuhiko Fujihira
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 20:32
CPC Classifications
H; H10; H10D; H10D12/00; H10D12/411; H10D12/441
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
167 words
In a conductivity modulation type MOSFET having high resistance layer of a first conductive type, a base region of a second conductive type, different from said first conductive type formed in said high resistance layer and a source region of a first conductive type formed in said base region, and characterized by a desirable low ON resistance and undesirable negative resistance characteristic, the improvement comprising the following combination; a continuous high impurity density buffer layer of a first conductive type coupled to said high resistance layer and arranged to prevent punch-through while maintaining said low ON resistance, a high impurity density semiconductor substrate of a second conductive type and an intermediate layer disposed between and of lower impurity density than said substrate and said buffer layer so as to lower the impurity density of the P-N junction between said substrate and said buffer layer; whereby said intermediate layer is effective to substantially eliminate the negative resistance characteristic while maintaining a low ON resistance characteristic of the MOSFET.
Claim 2
Dependent Claim
167 words
In a conductivity modulation type MOSFET having high resistance layer of a first conductive type, a base region of a second conductive type, different from said first conductive type formed in said high resistance layer and a source region of a first conductive type formed in said base region, and characterized by a desirable low ON resistance and undesirable negative resistance characteristic, the improvement comprising the following combination; a continuous high impurity density buffer layer of a first conductive type coupled to said high resistance layer and arranged to prevent punch-through while maintaining said low ON resistance, a high impurity density semiconductor substrate of a second conductive type and an intermediate layer disposed between and of lower impurity density than said substrate and said buffer layer so as to lower the impurity density of the P-N junction between said substrate and said buffer layer; whereby said intermediate layer is effective to substantially eliminate the negative resistance characteristic while maintaining a low ON resistance characteristic of the MOSFET.
Claim 3
Dependent Claim
22 words
A conductivity modulation type MOSFET according to claim 1 wherein said intermediate layer comprises a thin layer relative to said buffer layer.
Claim 4
Dependent Claim
21 words
A conductivity modulation type MOSFET according to claim 1 wherein said intermediate layer comprises a layer of said first conductive type.
Claim 5
Dependent Claim
21 words
A conductivity modulation type MOSFET according to claim 1 wherein said intermediate layer comprises a layer of said second conductive type.
Claim 6
Dependent Claim
207 words
In a conductivity modulation type MOSFET having a high resistance layer of a first conductive type, a base region of a second conductive type, different from said first conductive type, formed in said high resistance layer, a source region of a first conductive type formed in said base region, a semiconductor substrate having a drain electrode coupled thereto, an insulated gate formed on said high resistance layer, a source electrode formed on exposed portions of said base and source regions not covered by said insulated gate layer, and characterized by a desirable low ON resistance and undesirable negative resistance characteristic, the improvement comprising the following combination: a continuous high impurity density buffer layer of a first conductive type coupled to said high resistance layer and arranged to prevent punch-through while maintaining said low ON resistance, said semiconductor substrate being a high impurity density substrate of a second conductive type and an intermediate layer means disposed between and of lower impurity density than said substrate and said buffer layer for lowering the impurity density of the P-N junction between said substrate and said buffer layer; whereby said intermediate layer is effective to substantially eliminate the negative resistance characteristic while maintaining a low ON resistance characteristic of the MOSFET.
Claim 7
Dependent Claim
207 words
In a conductivity modulation type MOSFET having a high resistance layer of a first conductive type, a base region of a second conductive type, different from said first conductive type, formed in said high resistance layer, a source region of a first conductive type formed in said base region, a semiconductor substrate having a drain electrode coupled thereto, an insulated gate formed on said high resistance layer, a source electrode formed on exposed portions of said base and source regions not covered by said insulated gate layer, and characterized by a desirable low ON resistance and undesirable negative resistance characteristic, the improvement comprising the following combination: a continuous high impurity density buffer layer of a first conductive type coupled to said high resistance layer and arranged to prevent punch-through while maintaining said low ON resistance, said semiconductor substrate being a high impurity density substrate of a second conductive type and an intermediate layer means disposed between and of lower impurity density than said substrate and said buffer layer for lowering the impurity density of the P-N junction between said substrate and said buffer layer; whereby said intermediate layer is effective to substantially eliminate the negative resistance characteristic while maintaining a low ON resistance characteristic of the MOSFET.
Claim 8
Dependent Claim
22 words
A conductivity modulation type MOSFET according to claim 5 wherein said intermediate layer comprises a thin layer relative to said buffer layer.
Claim 9
Dependent Claim
21 words
A conductivity modulation type MOSFET according to claim 5 wherein said intermediate layer comprises a layer of said first conductive type.
Claim 10
Dependent Claim
21 words
A conductivity modulation type MOSFET according to claim 5 wherein said intermediate layer comprises a layer of said second conductive type.
References Cited (Backward Citations)
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