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US5234781A Expired / Lapsed US ⏱️ 0.0 years remaining

Mask for lithographic patterning and a method of manufacturing the same

Assignee: Fujitsu Semiconductor Ltd
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Filing: 1992-04-30
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Granted: 1993-08-10
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Expires: 2012-04-30
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Abstract

Abstract A mask for lithographic patterning comprises a base body provided with a through hole passing from a top side to a bottom side thereof, a mask layer provided on the top side of the base body so as to close the through hole, the mask layer being defined by a substantially flat top surface and a substantially flat bottom surface and having a thickness ranging from about 2 μm to about 20 μm, and a plurality of patterned apertures provided on the mask layer at a part closing the through hole.

Inventors

  • 👤 Kiichi Sakamoto
  • 👤 Hiroshi Yasuda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 09:38
CPC Classifications
G; G03; G03F; G03F1/00; G03F1/20

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 171 words
A method of manufacturing a mask for electron beam lithographic patterning, comprising the steps of: joining a lower major surface of a silicon substrate having upper and lower major surfaces to a top side of a silicon oxide base body; reducing a thickness of said silicon substrate joined to said base body by polishing said upper major surface of said silicon substrate such that said silicon substrate has a reduced and uniform thickness which is smaller than about 20 μm but is large enough for interrupting an electron beam; patterning said silicon substrate to from a mask pattern region in said silicon substrate by forming apertures in said mask pattern region to define a plurality of mask patterns; and etching said base body such that a part of said base body located under said mask pattern region is removed, said step of etching being continued until portions of said lower major surface of said silicon substrate that are in said mask pattern region and that surround said apertures are completely exposed.
Claim 2
Independent Claim 171 words
A method of manufacturing a mask for electron beam lithographic patterning, comprising the steps of: joining a lower major surface of a silicon substrate having upper and lower major surfaces to a top side of a silicon oxide base body; reducing a thickness of said silicon substrate joined to said base body by polishing said upper major surface of said silicon substrate such that said silicon substrate has a reduced and uniform thickness which is smaller than about 20 μm but is large enough for interrupting an electron beam; patterning said silicon substrate to from a mask pattern region in said silicon substrate by forming apertures in said mask pattern region to define a plurality of mask patterns; and etching said base body such that a part of said base body located under said mask pattern region is removed, said step of etching being continued until portions of said lower major surface of said silicon substrate that are in said mask pattern region and that surround said apertures are completely exposed.
Claim 3
Dependent Claim 24 words
A method as claimed in claim 1 in which each of said mask patterns has a size of at least about 300 μm×300 μm.
Claim 4
Dependent Claim 65 words
A method as claimed in claim 1 in which said step of joining said lower major surface of said silicon substrate to the top side of said base body comprises a step of annealing said silicon substrate and said base body at a temperature between 900° C. and 1000° C. in a state that said silicon substrate and said base body are contacting each other.
Claim 5
Dependent Claim 25 words
A method as claimed in claim 1 further comprising a step of depositing a metal layer on the silicon substrate after the step of patterning.
Claim 6
Independent Claim 312 words
A method of manufacturing a mask for electron beam lithographic patterning, comprising the steps of: joining a lower major surface of a silicon substrate having upper and lower major surfaces to an upper major surface of a base body having upper and lower major surfaces, said base body comprising a silicon oxide layer having upper and lower major surfaces and a base part having upper and lower major surfaces, said upper major surface of said base part being in contact with said lower major surface of said silicon oxide layer, said upper major surface of said silicon oxide layer being coincident with said upper major surface of said base body, and said lower major surface of said base part being coincident with said lower major surface of said base body; reducing a thickness of said silicon substrate joined to said base body by polishing said upper major surface of said silicon substrate such that said silicon substrate has a reduced and uniform thickness which is smaller than about 20 μm but is large enough for interrupting an electron beam; patterning said silicon substrate to form a mask pattern region in said silicon substrate by forming apertures in said mask pattern region to define a plurality of mask patterns; and etching said base body such that a part of said base body located under said mask pattern region is removed, said step of etching including a first step of etching said base body starting from said lower major surface of said base part to expose said lower major surface of said silicon oxide layer and a second step of selectively etching said silicon oxide layer starting from said exposed lower major surface of said silicon oxide layer until portions of said lower major surface of said silicon substrate that are in said mask pattern region and that surround said apertures are completely exposed.
Claim 7
Independent Claim 312 words
A method of manufacturing a mask for electron beam lithographic patterning, comprising the steps of: joining a lower major surface of a silicon substrate having upper and lower major surfaces to an upper major surface of a base body having upper and lower major surfaces, said base body comprising a silicon oxide layer having upper and lower major surfaces and a base part having upper and lower major surfaces, said upper major surface of said base part being in contact with said lower major surface of said silicon oxide layer, said upper major surface of said silicon oxide layer being coincident with said upper major surface of said base body, and said lower major surface of said base part being coincident with said lower major surface of said base body; reducing a thickness of said silicon substrate joined to said base body by polishing said upper major surface of said silicon substrate such that said silicon substrate has a reduced and uniform thickness which is smaller than about 20 μm but is large enough for interrupting an electron beam; patterning said silicon substrate to form a mask pattern region in said silicon substrate by forming apertures in said mask pattern region to define a plurality of mask patterns; and etching said base body such that a part of said base body located under said mask pattern region is removed, said step of etching including a first step of etching said base body starting from said lower major surface of said base part to expose said lower major surface of said silicon oxide layer and a second step of selectively etching said silicon oxide layer starting from said exposed lower major surface of said silicon oxide layer until portions of said lower major surface of said silicon substrate that are in said mask pattern region and that surround said apertures are completely exposed.
Claim 8
Dependent Claim 26 words
A method as claimed in claim 5 in which said second step of selectively etching comprises a step of isotropic etching using a fluoride etching agent.
Claim 9
Dependent Claim 46 words
A method as claimed in claim 5 in which said base part comprises a silicon body carrying said silicon oxide layer, and said step of joining said silicon substrate further comprises a step of providing said silicon oxide layer by thermal oxidation of said silicon body.
Claim 10
Dependent Claim 49 words
A method as claimed in claim 7 in which said first step of etching comprises an anisotropic etching of the silicon body using a solution of potassium hydroxide and said second step of selectively etching comprises an isotropic etching of the silicon oxide layer by a fluoride etching agent.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-08-09 1997-02-08 1997-08-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-08-09 2001-02-08 2001-08-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-08-09 2005-02-08 2005-08-10 $7700.00 Window Closed / Lapsed

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