Patent US5212801A successfully refreshed from Google Patents.
US5212801A
Expired / Lapsed
US
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Apparatus for responding to completion of each transition of a driver output signal for damping noise by increasing driver output impedance
Assignee: Advanced Micro Devices Inc
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Filing: 1990-08-31
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Granted: 1993-05-18
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Expires: 2010-08-31
Abstract
Abstract An apparatus for controlling digital driver signals to accommodate a host system comprising a driver control circuit for generating a plurality of first stage gating signals in response to a data signal; a driver circuit generating a driver signal output in response to the plurality of first stage gating signals; and impedance control circuitry for controlling output impedance response of the driver circuit. The impedance control circuitry comprises a high signal impedance circuit for effecting such adjusting for low-to-high transitions of the driver signal, and a low signal impedance control circuit for effecting such adjusting for high-to-low transitions of the driver signal. The high signal impedance control circuit gates a first digital switching device operatively connected between the driver circuit output and a voltage source, and the low signal impedance control circuit gates a second digital switching device operatively connected between the driver circuit output and ground. The high signal impedance control circuit and the low signal impedance control circuit respond to transitions of the driver signal to enhance such transitions and establish the first and second digital switching devices in an off configuration when the transition is complete, thereby increasing output impedance of the driver circuit. In an alternate embodiment, the high signal impedance control circuit and the low signal impedance control circuit respond to completion of transitions of the driver signal to appropriately gate the first and second digital switching devices to lower output impedance of the driver circuit.
Inventors
- 👤 Charles Farmer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 23:34
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/40; G06F13/4063; G06F13/4068; G06F13/4072; H; H03; H03K; H03K19/00; H03K19/003; H03K19/00346; H03K19/00361
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
284 words
An apparatus for controlling digital driver signals to accommodate a host system; the apparatus comprising: a driver control means for generating a plurality of gating signals in response to a received data signal; a driver means for generating a driver signal at a driver output in response to said plurality of gating signals; said driver means being connected to said driver control means to receive said plurality of gating signals and impedance control means for adjusting output impedance of said driver means in response to transitions of said driver signal, said impedance control means being connected to said driver means to receive said driver signal, said impedance control means comprising a high signal impedance control means for effecting said adjusting for low-to-high transitions of said driver signal and a low signal impedance control means for effecting said adjusting for high-to-low transitions of said driver signal; said high signal impedance control means being responsive to said driver signal for generating a first impedance control signal for controlling a first digital switching device to operatively connect said driver output with a voltage source; said low signal impedance control means being responsive to said driver signal for generating a second impedance control signal for controlling a second digital switching device to operatively connect said driver output with ground; said high signal impedance control means and said low signal impedance control means responding to said transitions of said driver signal to reduce noise during said transition, said high signal impedance control means and said low signal impedance control means respectively establishing said first and second digital switching devices off substantially upon completion of each said transition of said driver signal to increase output impedance of said driver means.
Claim 2
Independent Claim
284 words
An apparatus for controlling digital driver signals to accommodate a host system; the apparatus comprising: a driver control means for generating a plurality of gating signals in response to a received data signal; a driver means for generating a driver signal at a driver output in response to said plurality of gating signals; said driver means being connected to said driver control means to receive said plurality of gating signals and impedance control means for adjusting output impedance of said driver means in response to transitions of said driver signal, said impedance control means being connected to said driver means to receive said driver signal, said impedance control means comprising a high signal impedance control means for effecting said adjusting for low-to-high transitions of said driver signal and a low signal impedance control means for effecting said adjusting for high-to-low transitions of said driver signal; said high signal impedance control means being responsive to said driver signal for generating a first impedance control signal for controlling a first digital switching device to operatively connect said driver output with a voltage source; said low signal impedance control means being responsive to said driver signal for generating a second impedance control signal for controlling a second digital switching device to operatively connect said driver output with ground; said high signal impedance control means and said low signal impedance control means responding to said transitions of said driver signal to reduce noise during said transition, said high signal impedance control means and said low signal impedance control means respectively establishing said first and second digital switching devices off substantially upon completion of each said transition of said driver signal to increase output impedance of said driver means.
Claim 3
Dependent Claim
52 words
The apparatus for controlling digital driver signals to accommodate a host system as recited in claim 1 wherein said high signal impedance control means and said low signal impedance control means cooperatively respond to each said completion of said transition of said driver signal to lower output impedance of said driver means.
Claim 4
Dependent Claim
143 words
The apparatus for controlling digital driver signals to accommodate a host system as recited in claim 1 wherein each of said high signal impedance control means and said low signal impedance control means comprises a control circuit, said control circuit being connected to said driver means for receiving said driver signal and comprising an odd number of inverting means for generating a control signal in response to said driver signal, said control signal being the inverse of said driver signal, said control circuit further comprising an array of signal switching devices operatively connected with said inverting means for receiving said control signal and being controlled by said control signal; a first and a second signal switching device of said array of signal switching devices each controlling said first impedance control signal or said second impedance control signal in response to said control signal.
Claim 5
Dependent Claim
77 words
The apparatus for controlling digital driver signals to accommodate a host system as recited in claim 3 wherein said array of signal switching devices further comprises a third signal switching device, said third signal switching device being operatively connected with said driver control means and controlling one of said first impedance control signal or said second impedance control signal in response to an inverse antecedent signal of a selected gating signal of said plurality of gating signals.
Claim 6
Dependent Claim
41 words
The apparatus for controlling digital driver signals to accommodate a host system as recited in claim 4 wherein said first digital switching device is a P-channel field effect transistor and said second digital switching device is an N-channel field effect transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-05-17 | 1996-11-16 | 1997-05-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-05-17 | 2000-11-16 | 2001-05-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-05-17 | 2004-11-16 | 2005-05-18 | $7700.00 | Window Closed / Lapsed |