US5208474A
Expired / Lapsed
US
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Input circuit of a semiconductor device
Assignee: Mitsubishi Electric Corp
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Filing: 1991-01-28
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Granted: 1993-05-04
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Expires: 2011-01-28
Abstract
Abstract An input circuit of a semiconductor device includes a P type well formed on the main surface of a semiconductor substrate, and an N type region formed on the main surface in the P type well. A P-N junction is formed by the N type region and the P type well. An input voltage is applied to the N type region, which input voltage is applied to an internal circuit formed on the semiconductor substrate. When the P-N junction is rendered conductive by an application of an excessive voltage to the input voltage, the current caused by the excessive voltage is absorbed to the supply potential through the P type region formed in the P well.
Inventors
- 👤 Tadato Yamagata
- 👤 Hiroshi Miyamoto
- 👤 Michihiro Yamada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 17:03
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
191 words
An input circuit of a semiconductor device, comprising: a semiconductor substrate of a first conductivity type having a main surface and connected to a first potential; a first region of said same first conductivity type as said substrate, said first region formed on the main surface of said semiconductor substrate; a first region of a second conductivity type different from said first conductivity type formed on said main surface in the first region of said first conductivity type, wherein a P-N junction is formed by said first region of the second conductivity type and said first region of the first conductivity type, an input voltage applied to said first region of said second conductivity type, said input voltage applied to an internal circuit formed on said semiconductor substrate; and current absorbing means connected to a second region of the first conductivity type formed on said main surface in said first region of the first conductivity type for absorbing, when said P-N junction is rendered conductive by an application of an excessive voltage to said input voltage, current generated by said excessive voltage to a second potential different from said first potential.
Claim 2
Dependent Claim
191 words
An input circuit of a semiconductor device, comprising: a semiconductor substrate of a first conductivity type having a main surface and connected to a first potential; a first region of said same first conductivity type as said substrate, said first region formed on the main surface of said semiconductor substrate; a first region of a second conductivity type different from said first conductivity type formed on said main surface in the first region of said first conductivity type, wherein a P-N junction is formed by said first region of the second conductivity type and said first region of the first conductivity type, an input voltage applied to said first region of said second conductivity type, said input voltage applied to an internal circuit formed on said semiconductor substrate; and current absorbing means connected to a second region of the first conductivity type formed on said main surface in said first region of the first conductivity type for absorbing, when said P-N junction is rendered conductive by an application of an excessive voltage to said input voltage, current generated by said excessive voltage to a second potential different from said first potential.
Claim 3
Dependent Claim
178 words
An input circuit of a semiconductor device, comprising: a semiconductor substrate having a main surface; a first region of a first conductivity type formed on the main surface of said semiconductor substrate; a first region of a second conductivity type different from said first conductivity type formed on said main surface in the first region of said first conductivity type, wherein a P-N junction is formed by said first region of the second conductivity type and said first region of the first conductivity type, an input voltage applied to said first region of said second conductivity type, said input voltage applied to an internal circuit formed on said semiconductor substrate; and current absorbing means connected to a second region of the first conductivity type formed on said main surface in said first region of the first conductivity type for absorbing, when said P-N junction is rendered conductive by an application of an excessive voltage to said input voltage, current generated by excessive voltage, wherein said current absorbing means comprises a field effect element of said second conductivity type.
Claim 4
Dependent Claim
178 words
An input circuit of a semiconductor device, comprising: a semiconductor substrate having a main surface; a first region of a first conductivity type formed on the main surface of said semiconductor substrate; a first region of a second conductivity type different from said first conductivity type formed on said main surface in the first region of said first conductivity type, wherein a P-N junction is formed by said first region of the second conductivity type and said first region of the first conductivity type, an input voltage applied to said first region of said second conductivity type, said input voltage applied to an internal circuit formed on said semiconductor substrate; and current absorbing means connected to a second region of the first conductivity type formed on said main surface in said first region of the first conductivity type for absorbing, when said P-N junction is rendered conductive by an application of an excessive voltage to said input voltage, current generated by excessive voltage, wherein said current absorbing means comprises a field effect element of said second conductivity type.
Claim 5
Dependent Claim
21 words
An input circuit of a semiconductor device according to claim 2, wherein said field effect element comprises a field effect transistor.
Claim 6
Dependent Claim
91 words
An input circuit of a semiconductor device according to claim 2, wherein said field effect element of the second conductivity type comprises an N type MOSFET, said N type MOSFET has a first terminal and a second terminal, said second terminal connected to said second region of said first conductivity type, a substrate potential is supplied by said semiconductor substrate, and said first terminal of said field effect transistor connected to a supply potential, and said N type MOSFET operates in response to a prescribed potential higher than said substrate potential.
Claim 7
Dependent Claim
89 words
An input circuit of a semiconductor device according to claim 2, wherein said field effect element of the second conductivity type comprises a P type MOSFET, said P type MOSFET has a first terminal and a second terminal, said second terminal connected to said second region of said first conductivity type, a substrate potential is supplied to said semiconductor substrate, said first terminal of said P type MOSFET is connected to a ground potential, and said MOSFET operates in response to a prescribed potential lower than said substrate potential.
Claim 8
Independent Claim
115 words
An apparatus for controlling a substrate current in a semiconductor device for preventing undesirable current flow to said substrate caused by conduction of a P-N junction, wherein: said substrate includes: a well, an impurity region in said well, said substrate and said well having a common conductivity type, and a parasitic P-N junction between said well and said impurity region in said well; said substrate maintained at a first prescribed potential, comprising: P-N junction conduction detecting means for detecting conduction of said parasitic P-N junction; and excessive current absorbing means for absorbing, when said conduction detecting means detects conduction, excessive current generated by conduction to a second prescribed potential different from said first prescribed potential.
Claim 9
Independent Claim
115 words
An apparatus for controlling a substrate current in a semiconductor device for preventing undesirable current flow to said substrate caused by conduction of a P-N junction, wherein: said substrate includes: a well, an impurity region in said well, said substrate and said well having a common conductivity type, and a parasitic P-N junction between said well and said impurity region in said well; said substrate maintained at a first prescribed potential, comprising: P-N junction conduction detecting means for detecting conduction of said parasitic P-N junction; and excessive current absorbing means for absorbing, when said conduction detecting means detects conduction, excessive current generated by conduction to a second prescribed potential different from said first prescribed potential.
Claim 10
Independent Claim
161 words
An apparatus for controlling a substrate current in a semiconductor device having a P-N junction parasitically formed on a substrate, for preventing unpreferable current flow to said substrate caused by conduction of said P-N junction, said substrate maintained at a prescribed potential, comprising: P-N junction conduction detecting means for detecting conduction of said P-N junction; excessive current absorbing means for absorbing, when said conduction detecting means detects conduction, excessive current generated by conduction to a prescribed potential; said semiconductor device including a first region of a first conductivity type formed on a main surface of said substrate and including said P-N junction, and a second region of the first conductivity type not constituting said P-N junction formed on the main surface of said semiconductor substrate between said excessive current absorbing means and said first region, wherein said P-N junction conduction detecting means detects conduction of said P-N junction by detecting a potential of the second region of said first conductivity type.
Claim 11
Independent Claim
161 words
An apparatus for controlling a substrate current in a semiconductor device having a P-N junction parasitically formed on a substrate, for preventing unpreferable current flow to said substrate caused by conduction of said P-N junction, said substrate maintained at a prescribed potential, comprising: P-N junction conduction detecting means for detecting conduction of said P-N junction; excessive current absorbing means for absorbing, when said conduction detecting means detects conduction, excessive current generated by conduction to a prescribed potential; said semiconductor device including a first region of a first conductivity type formed on a main surface of said substrate and including said P-N junction, and a second region of the first conductivity type not constituting said P-N junction formed on the main surface of said semiconductor substrate between said excessive current absorbing means and said first region, wherein said P-N junction conduction detecting means detects conduction of said P-N junction by detecting a potential of the second region of said first conductivity type.
Claim 12
Dependent Claim
36 words
A substrate current controlling apparatus according to claim 7, further comprising switching means, absorbing said excessive current to said second prescribed potential by operating at a potential having a constant relation with said first prescribed potential.
Claim 13
Dependent Claim
117 words
In a semiconductor device having a parasitically formed P-N junction on a substrate, wherein said substrate includes: a well, an impurity region in said well, said substrate and said well having a common conductivity type, and said parasitically formed P-N junction being between said well and said impurity region in said well, a method of controlling substrate current for preventing undesirable current flow to said substrate caused by conduction of the parasitically formed P-N junction, comprising the steps of: maintaining said substrate at a first prescribed potential, detecting conduction of said parasitically formed P-N junction; and upon detection of said conduction, absorbing excessive current generated thereby to a second prescribed potential different from said first prescribed potential.
Claim 14
Dependent Claim
117 words
In a semiconductor device having a parasitically formed P-N junction on a substrate, wherein said substrate includes: a well, an impurity region in said well, said substrate and said well having a common conductivity type, and said parasitically formed P-N junction being between said well and said impurity region in said well, a method of controlling substrate current for preventing undesirable current flow to said substrate caused by conduction of the parasitically formed P-N junction, comprising the steps of: maintaining said substrate at a first prescribed potential, detecting conduction of said parasitically formed P-N junction; and upon detection of said conduction, absorbing excessive current generated thereby to a second prescribed potential different from said first prescribed potential.
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