Patent US5156983A successfully refreshed from Google Patents.
US5156983A
Expired / Lapsed
US
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Method of manufacturing tape automated bonding semiconductor package
Assignee: Hewlett Packard Development Co LP
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Filing: 1989-10-26
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Granted: 1992-10-20
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Expires: 2009-10-26
Abstract
Abstract This invention involves the selective plating of the outer leads in tape automated bonding section (TAB section). An inner and an outer gasket are mounted over, respectively, an inner and an outer portion of the outer leads and a voltage is applied to a common plane conductor. A barrier material, usually nickel, is applied to the outer leads protruding between the inner and the outer leads and then solder is applied over the nickel layer. The debus areas which connect all the outer leads to the common plane conductor are then excised from the TAB section which is now ready for final test.
Inventors
- 👤 Randall L. Schlesinger
- 👤 Ralph W. Doe
- 👤 Richard D. Gates
- 👤 Dennis P. Goddard
- 👤 Shih C. Hsu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 11:46
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/071; H10W72/077; H10W70/00; H10W70/40; H10W70/453; H10W72/0711; H10W72/701; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121; Y10T29/49124; Y10T29/49126
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
239 words
In the process of manufacturing a tape automated bonding semiconductor package, the tape automated bonding semiconductor package having a tape automated bonding section mounted within a carrier frame, the tape automated bonding section having a central aperture and a plurality of electrical conductors, each electrical conductor having an inner lead located at the perimeter of the central aperture, an outer lead distally located from the inner lead, and a test pad distally located from the outer lead, a method of selectively plating the outer leads comprising the steps of: a) providing the tape automated bonding section with a plurality of debus areas, each debus area located around the outer perimeter of the tape automatic bonding section between the test pads and a common plane conductor, each debus area interconnecting a plurality of the test pads to the common plane conductor; b) applying an electromative potential to the common plane conductor; c) mounting an inner and an outer gasket over, respectively, an inner and an outer portion of the outer leads, said inner and outer gaskets defining therebetween a region of said outer leads to which a solder coating is to be applied; d) applying a barrier material to the outer leads in the region between the inner and the outer gaskets; e) applying a solder coating to the outer leads over the barrier material in the region; and f) excising the debus areas from the tape automated bonding section.
Claim 2
Dependent Claim
239 words
In the process of manufacturing a tape automated bonding semiconductor package, the tape automated bonding semiconductor package having a tape automated bonding section mounted within a carrier frame, the tape automated bonding section having a central aperture and a plurality of electrical conductors, each electrical conductor having an inner lead located at the perimeter of the central aperture, an outer lead distally located from the inner lead, and a test pad distally located from the outer lead, a method of selectively plating the outer leads comprising the steps of: a) providing the tape automated bonding section with a plurality of debus areas, each debus area located around the outer perimeter of the tape automatic bonding section between the test pads and a common plane conductor, each debus area interconnecting a plurality of the test pads to the common plane conductor; b) applying an electromative potential to the common plane conductor; c) mounting an inner and an outer gasket over, respectively, an inner and an outer portion of the outer leads, said inner and outer gaskets defining therebetween a region of said outer leads to which a solder coating is to be applied; d) applying a barrier material to the outer leads in the region between the inner and the outer gaskets; e) applying a solder coating to the outer leads over the barrier material in the region; and f) excising the debus areas from the tape automated bonding section.
Claim 3
Dependent Claim
25 words
The method of claim 1 wherein the step of applying a barrier material comprises applying a nickel barrier material to gold plated copper outer leads.
Claim 4
Dependent Claim
41 words
The method of claim 1 wherein the step of excising the debus area comprises maintaining the debus areas as open areas without dielectric film, and using a laser beam for removal of the debus areas from the tape automated bonding section.
Claim 5
Independent Claim
189 words
A method of manufacturing a tape automated bonding semiconductor package comprising the steps of: a) mounting an individual tape automated bonding section within a carrier frame, the tape automated bonding section having a central aperture and a plurality of electrical conductors, each electrical conductor having an inner lead located around the perimeter of the central aperture, an outer lead distally located from the inner lead, and a test pad distally located from the outer lead along the outer perimeter of the tape automated bonding section, each test pad electrically connected to a common plane conductor by a plurality of debus areas; b) aligning each specific inner lead with a specific contact pad on a semiconductor chip; c) bonding each specific inner lead to each specific contact pad on the semiconductor chip; d) mounting a housing member on opposite faces of the tape automated bonding section so as to enclose the semiconductor chip and the inner leads therebetween; e) after said mounting step, selectively plating the outer leads with a barrier material and then a solder layer; and f) excising the tape automated bonding semiconductor package from the carrier frame.
Claim 6
Independent Claim
189 words
A method of manufacturing a tape automated bonding semiconductor package comprising the steps of: a) mounting an individual tape automated bonding section within a carrier frame, the tape automated bonding section having a central aperture and a plurality of electrical conductors, each electrical conductor having an inner lead located around the perimeter of the central aperture, an outer lead distally located from the inner lead, and a test pad distally located from the outer lead along the outer perimeter of the tape automated bonding section, each test pad electrically connected to a common plane conductor by a plurality of debus areas; b) aligning each specific inner lead with a specific contact pad on a semiconductor chip; c) bonding each specific inner lead to each specific contact pad on the semiconductor chip; d) mounting a housing member on opposite faces of the tape automated bonding section so as to enclose the semiconductor chip and the inner leads therebetween; e) after said mounting step, selectively plating the outer leads with a barrier material and then a solder layer; and f) excising the tape automated bonding semiconductor package from the carrier frame.
Claim 7
Dependent Claim
41 words
The method of claim 4 wherein the step of excising the debus area comprises maintaining the debus areas as open areas without dielectric film, and using a laser beam for removal of the debus areas from the tape automated bonding section.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-10-20 | 1996-04-20 | 1996-10-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-10-20 | 2000-04-20 | 2000-10-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-10-20 | 2004-04-20 | 2004-10-20 | $7700.00 | Window Closed / Lapsed |