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US5146223A Expired / Lapsed US ⏱️ 0.0 years remaining

Analog-to-digital converter circuit

Assignee: NEC Corp
•
Filing: 1991-11-01
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Granted: 1992-09-08
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Expires: 2011-11-01
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Abstract

Abstract The offset from the ideal value for the bias voltage to be added to the input signal to the A/D converter and the offset from the ideal value of the average voltage in the analog signal are detected. The detected offset is substracted from the output data of the A/D converter. Alternately, the bias voltage may be changed by the detected offset so that the average voltage of the input signal to the A/D converter is equal to the ideal value.

Inventors

  • 👤 Hiroyasu Muto

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 22:37
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/06; H03M1/0602; H03M1/0604; H03M1/0607; H03M1/12

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 106 words
An A/D converter circuit comprising: bias voltage summing means for adding a bias voltage to an analog signal; A/D converter means for digitizing the output analog signal from said bias voltage summing means in the range between the low and high reference voltages; offset detection means for detecting the offset by subtracting the ideal average voltage of the analog signal and the ideal value of the bias voltage from the average value of output samples from said A/D converter means; and subtraction means for deriving the output by subtracting the output data of said offset detection circuit from the output data of said A/D converter means.
Claim 2
Dependent Claim 106 words
An A/D converter circuit comprising: bias voltage summing means for adding a bias voltage to an analog signal; A/D converter means for digitizing the output analog signal from said bias voltage summing means in the range between the low and high reference voltages; offset detection means for detecting the offset by subtracting the ideal average voltage of the analog signal and the ideal value of the bias voltage from the average value of output samples from said A/D converter means; and subtraction means for deriving the output by subtracting the output data of said offset detection circuit from the output data of said A/D converter means.
Claim 3
Dependent Claim 140 words
An A/D converter circuit comprising: bias voltage summing means for adding a bias voltage to an analog signal; bias voltage generation means for generating the bias voltage; A/D converter means for digitizing the output analog signal from said bias voltage summing means in the range between low and high reference voltages; offset detection means for detecting offset by subtracting the ideal average voltage of the analog signal and the ideal value of the bias voltage from the average value of the output samples from said A/D converter means; and correction means for supplying the output of said offset detection means to either one of said bias voltage generation circuit or said bias voltage summing circuit to correct the bias voltage so that the average voltage of the input signal to said A/D converter means is equal to the ideal value.
Claim 4
Dependent Claim 140 words
An A/D converter circuit comprising: bias voltage summing means for adding a bias voltage to an analog signal; bias voltage generation means for generating the bias voltage; A/D converter means for digitizing the output analog signal from said bias voltage summing means in the range between low and high reference voltages; offset detection means for detecting offset by subtracting the ideal average voltage of the analog signal and the ideal value of the bias voltage from the average value of the output samples from said A/D converter means; and correction means for supplying the output of said offset detection means to either one of said bias voltage generation circuit or said bias voltage summing circuit to correct the bias voltage so that the average voltage of the input signal to said A/D converter means is equal to the ideal value.
Claim 5
Dependent Claim 123 words
An A/D converter circuit comprising: bias voltage summing means for adding a bias voltage to an analog signal; A/D converter means for digitizing the output analog signal from said bias voltage summing means in the range between low and high reference voltage; means for outputting the accumulated value of a predetermined number (N) of samples; means for obtaining the average value by dividing the accumulated value by N; means for detecting the offset voltage value by subtracting the ideal average voltage value of the analog signal and the ideal value of the bias voltage from the average value; and subtraction means for outputting the subtraction of the output data of said offset detection circuit from the output data of said A/D converter means.
Claim 6
Dependent Claim 123 words
An A/D converter circuit comprising: bias voltage summing means for adding a bias voltage to an analog signal; A/D converter means for digitizing the output analog signal from said bias voltage summing means in the range between low and high reference voltage; means for outputting the accumulated value of a predetermined number (N) of samples; means for obtaining the average value by dividing the accumulated value by N; means for detecting the offset voltage value by subtracting the ideal average voltage value of the analog signal and the ideal value of the bias voltage from the average value; and subtraction means for outputting the subtraction of the output data of said offset detection circuit from the output data of said A/D converter means.
Claim 7
Dependent Claim 29 words
The A/D converter circuit of claim 3 wherein the correction is made by subtraction operation using continuous offset voltage values of the samples subsequent to the predetermined number (N).
Claim 8
Dependent Claim 31 words
The A/D converter circuit of claim 3 wherein the correction is made by subtraction operation using offset voltage value of a predetermined number of samples subsequent to the predetermined number (N).
Claim 9
Dependent Claim 159 words
An A/D converter circuit comprising: bias voltage summing means for adding a bias voltage to an analog signal; bias voltage generation means for generating the bias voltage; A/D converter means for digitizing the output analog signal from said bias voltage summing means in the range between low and high reference voltages; means for outputting the accumulated value of a predetermined number (N) of samples; means for obtaining the average value by dividing the accumulated value by N; means for detecting the offset voltage value by subtracting the ideal average voltage value of the analog signal and the ideal value of the bias voltage from the average value; and correction means for supplying the output of said offset detection means to either one of said bias voltage generation circuit or said bias voltage summing circuit to correct the bias voltage so that the average voltage of the input signal to said A/D converter means is equal to the ideal value.
Claim 10
Dependent Claim 159 words
An A/D converter circuit comprising: bias voltage summing means for adding a bias voltage to an analog signal; bias voltage generation means for generating the bias voltage; A/D converter means for digitizing the output analog signal from said bias voltage summing means in the range between low and high reference voltages; means for outputting the accumulated value of a predetermined number (N) of samples; means for obtaining the average value by dividing the accumulated value by N; means for detecting the offset voltage value by subtracting the ideal average voltage value of the analog signal and the ideal value of the bias voltage from the average value; and correction means for supplying the output of said offset detection means to either one of said bias voltage generation circuit or said bias voltage summing circuit to correct the bias voltage so that the average voltage of the input signal to said A/D converter means is equal to the ideal value.
Claim 11
Dependent Claim 170 words
An A/D converter circuit comprising: bias voltage summing means for adding a bias voltage to an analog signal; bias voltage generation means for generating the bias voltage; A/D converter means for digitizing the output analog signal from said bias voltage summing means in the range between low and high reference voltages; means for outputting the accumulated value of a predetermined number (N) of samples; means for obtaining the average value by dividing the accumulated value by N; means for detecting the offset voltage value by subtracting the ideal average voltage value of the analog signal and the ideal value of the bias voltage from the average value; D/A converting means for converting the obtained offset voltage into an analogue signal and supplying the converted signal to one of said bias voltage generating circuit and said bias voltage adding circuit; and means, in response to the output of said D/A converting means, for compensating the bias voltage of one of said bias voltage generating circuit and said bias voltage adding circuit.
Claim 12
Dependent Claim 170 words
An A/D converter circuit comprising: bias voltage summing means for adding a bias voltage to an analog signal; bias voltage generation means for generating the bias voltage; A/D converter means for digitizing the output analog signal from said bias voltage summing means in the range between low and high reference voltages; means for outputting the accumulated value of a predetermined number (N) of samples; means for obtaining the average value by dividing the accumulated value by N; means for detecting the offset voltage value by subtracting the ideal average voltage value of the analog signal and the ideal value of the bias voltage from the average value; D/A converting means for converting the obtained offset voltage into an analogue signal and supplying the converted signal to one of said bias voltage generating circuit and said bias voltage adding circuit; and means, in response to the output of said D/A converting means, for compensating the bias voltage of one of said bias voltage generating circuit and said bias voltage adding circuit.
Claim 13
Dependent Claim 73 words
An A/D converting method comprising the steps of: adding a bias voltage to an analog signal; digitizing the added analog signal in the range between the low and high reference voltages; detecting an offset by subtracting the ideal average voltage of the analog signal and the ideal value of the bias voltage from the average value of said digitized data; and deriving the output by subtracting said detected offset from said digitized data.
Claim 14
Dependent Claim 73 words
An A/D converting method comprising the steps of: adding a bias voltage to an analog signal; digitizing the added analog signal in the range between the low and high reference voltages; detecting an offset by subtracting the ideal average voltage of the analog signal and the ideal value of the bias voltage from the average value of said digitized data; and deriving the output by subtracting said detected offset from said digitized data.

References Cited (Backward Citations)

US4251803A Cited
US4380005A Cited
US4228423A Cited
US4229703A Cited
US4498072A Cited
US4590458A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-09-08 1996-03-09 1996-09-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-09-08 2000-03-09 2000-09-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-09-08 2004-03-09 2004-09-08 $7700.00 Window Closed / Lapsed

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