Heterojunction bipolar transistor and the manufacturing method thereof

Claim 2

A heterojunction bipolar transistor comprising: a) an emitter region; b) a base region; and c) a collector region, wherein an intrinsic base region and an external base region of said base region contact with each other at one side edge of each with said intrinsic base in the form of a rectangle extending laterally from said external base in a plane parallel to said substrate, and the length and width of said extending rectangle is selected to be smaller than that of said external base region.

Claim 3

A semiconductor integrated circuit comprising: A) a collector top type heterojunction bipolar transistor having a) an emitter region layer; b) an external base region layer having a surface generally coplanar with a surface of said emitter region layer, and contacting said coplanar emitter region at one side edge surface of each of said layers, each said side surface being transverse to said coplanar surfaces; c) an intrinsic base region connected to said external base region and extending laterally therefrom into a region overlapping the boundary between said emitter region and said external base region; d) a collector region formed on said intrinsic base region; and B) a load resistor made of a material layer the same as that forming said emitter or base region of said collector top type heterojunction bipolar transistor.

Claim 4

A semiconductor integrated circuit comprising: A) a collector top type heterojunction bipolar transistor having a) an emitter region layer; b) an external base region layer having a surface generally coplanar with a surface of said emitter region layer, and contacting said coplanar emitter region at one side edge surface of each of said layers, each said side surface being transverse to said coplanar surfaces; c) an intrinsic base region connected to said external base region and extending laterally therefrom into a region overlapping the boundary between said emitter region and said external base region; d) a collector region formed on said intrinsic base region; and B) a load resistor made of a material layer the same as that forming said emitter or base region of said collector top type heterojunction bipolar transistor.

Claim 5

A semiconductor integrated circuit comprising: A) an emitter top type heterojunction bipolar transistor having a) a collector region layer; b) an external base region layer generally coplanar with said collector region layer, and contacting a side surface of said collector region at a single side surface through the thickness of said external base region layer; c) an intrinsic base region connected to said external base region and extending laterally therefrom into a region overlapping the boundary between said collector region and said external base region; and d) an emitter region formed on said intrinsic base region; and B) a load resistor made of a material the same as that of said collector or base region of said emitter top type heterojunction bipolar transistor.

Claim 6

A semiconductor integrated circuit comprising: A) an emitter top type heterojunction bipolar transistor having a) a collector region layer; b) an external base region layer generally coplanar with said collector region layer, and contacting a side surface of said collector region at a single side surface through the thickness of said external base region layer; c) an intrinsic base region connected to said external base region and extending laterally therefrom into a region overlapping the boundary between said collector region and said external base region; and d) an emitter region formed on said intrinsic base region; and B) a load resistor made of a material the same as that of said collector or base region of said emitter top type heterojunction bipolar transistor.

Claim 7

A heterojunction bipolar transistor comprising: a) a compound semiconductor substrate; b) an emitter region; c) a base region including an intrinsic base region and an external base region, said external base region and said emitter region being formed on said substrate in a single layer supported by a common surface of said substrate in side-by-side fashion with only the edges of said external base region and said emitter region adjacent each other within said single layer; said intrinsic base region overlying said emitter region; d) a collector region; and e) a barrier layer formed between said external base and emitter regions and said compound semiconductor substrate.

Claim 8

A heterojunction bipolar transistor comprising: a) a compound semiconductor substrate; b) an emitter region; c) a base region including an intrinsic base region and an external base region, said external base region and said emitter region being formed on said substrate in a single layer supported by a common surface of said substrate in side-by-side fashion with only the edges of said external base region and said emitter region adjacent each other within said single layer; said intrinsic base region overlying said emitter region; d) a collector region; and e) a barrier layer formed between said external base and emitter regions and said compound semiconductor substrate.

Claim 9

A heterojunction bipolar transistor comprising: a) an emitter region; b) a collector region; c) a base region, said external base region and and an intrinsic base region, said external base region and said emitter region being formed on said substrate in a single layer supported by a common surface of said substrate in side-by-side fashion, with said intrinsic base formed as an overlapping area extending laterally from said external base region approximately parallel to said substrate and overlapping an area of said emitter region and overlapping an area of said collector region, with said external base region not overlapping either said collector or emitter regions, said overlapping area having a length and width measured in a plane parallel to said substrate which is less than the length and width of said external base region measured in a plane parallel to said substrate, said base region being partly overlapped on said emitter or collector region, wherein said collector or emitter region is formed on a region including said overlapped portion of said base region; and said intrinsic base region formed by said overlapped portion.

Claim 10

A heterojunction bipolar transistor comprising: a) an emitter region; b) a collector region; c) a base region, said external base region and and an intrinsic base region, said external base region and said emitter region being formed on said substrate in a single layer supported by a common surface of said substrate in side-by-side fashion, with said intrinsic base formed as an overlapping area extending laterally from said external base region approximately parallel to said substrate and overlapping an area of said emitter region and overlapping an area of said collector region, with said external base region not overlapping either said collector or emitter regions, said overlapping area having a length and width measured in a plane parallel to said substrate which is less than the length and width of said external base region measured in a plane parallel to said substrate, said base region being partly overlapped on said emitter or collector region, wherein said collector or emitter region is formed on a region including said overlapped portion of said base region; and said intrinsic base region formed by said overlapped portion.

Claim 11

A heterojunction bipolar transistor comprising: a) a semiconductor substrate; b) an external base region; c) an emitter region; d) a collector region, one of said emitter or collector regions being formed on said substrate in a single layer with said external base region supported by a common surface of said substrate, with said one region and said external base region in side-by-side relationship on said common surface, with said external base region contacting said one of said emitter or collector region at only one part of said external base region adjacent a side surface thereof, said side surface being transverse to said common surface; and e) an intrinsic base region having a length and width less than said external base region and connected to and extending laterally from said external base region to overlap the boundary between said emitter and collector regions, and said external base region not contacting with the other parts of said emitter or collector, wherein the other of sad collector or emitter region is formed on said intrinsic base region.

Claim 12

A heterojunction bipolar transistor comprising: a) a semiconductor substrate; b) an external base region; c) an emitter region; d) a collector region, one of said emitter or collector regions being formed on said substrate in a single layer with said external base region supported by a common surface of said substrate, with said one region and said external base region in side-by-side relationship on said common surface, with said external base region contacting said one of said emitter or collector region at only one part of said external base region adjacent a side surface thereof, said side surface being transverse to said common surface; and e) an intrinsic base region having a length and width less than said external base region and connected to and extending laterally from said external base region to overlap the boundary between said emitter and collector regions, and said external base region not contacting with the other parts of said emitter or collector, wherein the other of sad collector or emitter region is formed on said intrinsic base region.