US5136534A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for a filament channel pass gate ferroelectric capacitor memory cell
Assignee: Texas Instruments Inc
•
Filing: 1991-07-16
•
Granted: 1992-08-04
•
Expires: 2011-07-16
Abstract
Abstract A memory cell is disclosed which comprises a filament channel transistor and a ferroelectric capacitor formed on a surface of a semiconductor substrate. The transistor comprises a substantially cylindrical channel filament which is formed substantially perpendicular to the substrate surface between the surface and the capacitor. The capacitor comprises a storage layer which can be formed of a ferroelectric material such that the memory cell is nonvolatile. The storage layer may also comprise a high dielectric material such that the memory cell is operable as a dynamic random access memory cell.
Inventors
- 👤 James M. McDavid
- 👤 David R. Clark
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 00:34
CPC Classifications
H; H10; H10B; H10B53/00; G; G11; G11C; G11C11/00; G11C11/21; G11C11/22; G11C11/34; G11C11/40; G11C11/401; G11C11/403; G11C11/404
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
157 words
A memory cell formed on a surface of a substrate and coupled to a wordline and a bitline, comprising: a substrate; a bitline formed at the surface of said substrate; a transistor, said transistor having a channel comprising a substantially cylindrical semiconductor filament, said channel formed on said bitline and extending substantially perpendicular to and away from said substrate and bitline, an end of said filament coupled to the bitline, the wordline disposed about said filament such that the wordline is operable to actuate said channel; and a capacitor comprising a first electrode, a second electrode and a storage layer, said first electrode formed substantially vertically above and coupled to an opposite end of said filament such that said filament is between said bitline and said first electrode, said storage layer formed substantially vertically above said first electrode and second electrode formed substantially vertically above said storage layer, said second electrode coupled to a predetermined voltage level.
Claim 2
Dependent Claim
157 words
A memory cell formed on a surface of a substrate and coupled to a wordline and a bitline, comprising: a substrate; a bitline formed at the surface of said substrate; a transistor, said transistor having a channel comprising a substantially cylindrical semiconductor filament, said channel formed on said bitline and extending substantially perpendicular to and away from said substrate and bitline, an end of said filament coupled to the bitline, the wordline disposed about said filament such that the wordline is operable to actuate said channel; and a capacitor comprising a first electrode, a second electrode and a storage layer, said first electrode formed substantially vertically above and coupled to an opposite end of said filament such that said filament is between said bitline and said first electrode, said storage layer formed substantially vertically above said first electrode and second electrode formed substantially vertically above said storage layer, said second electrode coupled to a predetermined voltage level.
Claim 3
Dependent Claim
38 words
The memory cell of claim 1, wherein said storage layer comprises a dielectric material such that said capacitor is operable as a substantially linear capacitor and the memory cell is operable as a dynamic random access memory cell.
Claim 4
Dependent Claim
36 words
The memory cell of claim 1, wherein said storage layer comprises a ferroelectric material such that said capacitor is operable as a nonlinear hysteretic capacitor and the memory cell is operable as a nonvolatile memory cell.
Claim 5
Dependent Claim
19 words
The memory cell of claim 1 and further comprising an insulative layer disposed between the wordline and said filament.
Claim 6
Dependent Claim
12 words
The memory cell of claim 4, wherein said insulative layer comprises oxide.
Claim 7
Dependent Claim
17 words
The memory cell of claim 1 wherein said bitline is formed in the surface of said substrate.
Claim 8
Dependent Claim
20 words
The memory cell of claim 1 wherein said bitline comprises a conductive material on an upper surface of said substrate.
Claim 9
Dependent Claim
116 words
A memory cell formed on a surface of a substrate of a first conductivity type, comprising: a substrate; a conductive bitline formed in the substrate to be of a second conductivity type; a substantially cylindrical channel filament formed substantially perpendicular to and extending away from and fully above the surface and having a first end coupled to said bitline; a conductive wordline insulatively disposed about said filament; a first electrode formed substantially vertically above and coupled to the second end of said filament; a storage layer formed substantially vertically above and adjoining said first electrode; and a second electrode formed substantially vertically above and adjoining said capacitor storage body and coupled to a predetermined voltage level.
Claim 10
Dependent Claim
116 words
A memory cell formed on a surface of a substrate of a first conductivity type, comprising: a substrate; a conductive bitline formed in the substrate to be of a second conductivity type; a substantially cylindrical channel filament formed substantially perpendicular to and extending away from and fully above the surface and having a first end coupled to said bitline; a conductive wordline insulatively disposed about said filament; a first electrode formed substantially vertically above and coupled to the second end of said filament; a storage layer formed substantially vertically above and adjoining said first electrode; and a second electrode formed substantially vertically above and adjoining said capacitor storage body and coupled to a predetermined voltage level.
Claim 11
Dependent Claim
12 words
The memory cell of claim 8, wherein said wordline comprises polycrystalline silicon.
Claim 12
Dependent Claim
22 words
The memory cell of claim 8 and further comprising an insulative layer disposed about said filament between said filament and said wordline.
Claim 13
Dependent Claim
12 words
The memory cell of claim 10, wherein said insulative layer comprises oxide.
Claim 14
Dependent Claim
14 words
The memory cell of claim 8, wherein said first and second electrodes comprise nichrome.
Claim 15
Dependent Claim
14 words
The memory cell of claim 8 wherein said storage layer comprises a dielectric material.
Claim 16
Dependent Claim
14 words
The memory cell of claim 8 wherein said storage layer comprises a ferroelectric material.
References Cited (Backward Citations)
US4129880A
Cited
US4149302A
Cited
US4200879A
Cited
US4985738A
Cited
US4163986A
Cited
US4688063A
Cited
US4721987A
Cited
US4630088A
Cited
US4907047A
Cited
US4845673A
Cited
US4811067A
Cited
US4959698A
Cited
US4800527A
Cited
US4873664A
Cited
US5001526A
Cited
US4888630A
Cited
US4893272A
Cited
US4888733A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-08-04 | 1996-02-03 | 1996-08-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-08-04 | 2000-02-03 | 2000-08-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-08-04 | 2004-02-03 | 2004-08-04 | $7700.00 | Window Closed / Lapsed |