US5126601A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Driver and receiver for a differential-signal electrical interface
Assignee: Intellectual Ventures I LLC
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Filing: 1990-11-15
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Granted: 1992-06-30
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Expires: 2010-11-15
Abstract
Abstract Driver and receiver circuits for a differential-signal electrical interface contain comparators and resistive networks to eliminate the need for operational amplifiers, thus lowering cost and raising reliability. The preferred embodiments for the driver and receiver are optimized for use with transistor-transistor logic (TTL) signals and the International Telegraph and Telephone Consultative Committee (CCITT) 1985 Recommendation V.35, which recommendation was designed for use with wideband modems.
Inventors
- 👤 Timothy F. Murphy
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 22:11
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/08; H03; H03K; H03K19/00; H03K19/0175; H03K19/017545
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
126 words
A driver for driving and converting a first logic signal to first and second differential signals, comprising: a first comparator coupled at a non-inverting input to said first logic signal and at a second input to a reference voltage; a second comparator coupled at an inverting input to said first logic signal and at a second input to said reference voltage; and a substantially passive resistive network coupled to outputs of said first and second comparators for voltage and impedance matching output signals from said first and second comparators to said first and second differential signals, such that a source impedance of the driver lies in the approximate range of 50 to 100 ohms; wherein the output signals from said first and second comparators are complementary.
Claim 2
Dependent Claim
126 words
A driver for driving and converting a first logic signal to first and second differential signals, comprising: a first comparator coupled at a non-inverting input to said first logic signal and at a second input to a reference voltage; a second comparator coupled at an inverting input to said first logic signal and at a second input to said reference voltage; and a substantially passive resistive network coupled to outputs of said first and second comparators for voltage and impedance matching output signals from said first and second comparators to said first and second differential signals, such that a source impedance of the driver lies in the approximate range of 50 to 100 ohms; wherein the output signals from said first and second comparators are complementary.
Claim 3
Dependent Claim
19 words
The driver in claim 1 wherein the difference between said first and second differential signals is substantially 0.55 volts.
Claim 4
Dependent Claim
24 words
The driver in claim 1 wherein the value of said first and second differential signals ranges from plus 0.275 volts to minus 0.275 volts.
Claim 5
Dependent Claim
16 words
The driver in claim 2 wherein said first logic signal is a transistor-transistor logic (TTL) signal.
Claim 6
Dependent Claim
16 words
The driver in claim 1 further comprising a reference voltage generator for generating said reference voltage.
Claim 7
Dependent Claim
35 words
The driver in claim 1 further comprising high frequency filter means coupled to outputs of said resistive network for filtering high frequency components from said first and second differential signals, to reduce electro-magnetic interference (EMI).
Claim 8
Dependent Claim
21 words
The driver in claim 5 further comprising a buffer capacitor coupled to said reference voltage generator for stabilizing said reference voltage.
Claim 9
Dependent Claim
83 words
The driver in claim 1 wherein the difference between said first and second differential signals is substantially 0.55 volts, and wherein said first logic signal is a TTL signal, said driver further comprising: a reference voltage generator for generating said reference voltage; high frequency filter means coupled to outputs of said resistive network for filtering high frequency components from said first and second differential signals, to reduce EMI; and a buffer capacitor coupled to said reference voltage generator for stabilizing said reference voltage.
Claim 10
Dependent Claim
98 words
A receiver for receiving and converting first and second differential signals to a first logic signal comprising: a resistive network coupled to said first and second differential signals for impedance matching said first and second differential signals; and a comparator coupled at an inverting input to said first differential signal output by said resistive network, and coupled at a non-inverting input to said second differential signal output by said resistive network, said comparator outputting signals representative of said first logic signal, and said resistive network reducing a load impedance which the receiver presents to the first logic signal.
Claim 11
Dependent Claim
98 words
A receiver for receiving and converting first and second differential signals to a first logic signal comprising: a resistive network coupled to said first and second differential signals for impedance matching said first and second differential signals; and a comparator coupled at an inverting input to said first differential signal output by said resistive network, and coupled at a non-inverting input to said second differential signal output by said resistive network, said comparator outputting signals representative of said first logic signal, and said resistive network reducing a load impedance which the receiver presents to the first logic signal.
Claim 12
Dependent Claim
19 words
The receiver in claim 9 wherein the difference between said first and second differential signals is substantially 0.55 volts.
Claim 13
Dependent Claim
24 words
The receiver in claim 9 wherein the value of said first and second differential signals ranges from plus 0.275 volts to minus 0.275 volts.
Claim 14
Dependent Claim
16 words
The receiver in claim 10 wherein said first logic signal is a transistor-transistor logic (TTL) signal.
Claim 15
Dependent Claim
29 words
The receiver in claim 9 wherein the difference between said first and second differential signals is substantially 0.55 volts, and wherein said first logic signal is a TTL signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-06-30 | 1995-12-30 | 1996-06-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-06-30 | 1999-12-30 | 2000-06-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-06-30 | 2003-12-30 | 2004-06-30 | $7700.00 | Window Closed / Lapsed |