Universal power transistor base drive control unit

Claim 2

Apparatus for regulating the operation of a power transistor immediately in the vicinity of saturation during the ON time thereof, comprising: a power transistor having input and output circuits; a timing signal source generating signals for turning the transistor ON and OFF; a base drive circuit connected to the input circuit of the transistor and responsive to timing signals for generating a base drive when the transistor is to be turned ON and for altering the base drive when the transistor is to be turned OFF; means responsive to a measured parameter in the input circuit of the transistor to produce a feedback signal representing a regulated state of the transistor; a user adjustable power transistor regulation setpoint reference; and regulator means connected to receive the feedback signal and the regulation setpoint reference for producing an error signal, said error signal being connected to the base drive circuit to alter the base drive to maintain the transistor in a desired condition during the ON time thereof.

Claim 3

Apparatus as defined in claim 1, wherein said means responsive to a measured parameter includes a first amplifier, and said regulator means comprises a second amplifier, said second amplifier being connected to receive the feedback signal from the first amplifier and to receive the reference signal and to compare the two signals for producing the error signal.

Claim 4

Apparatus as defined in claim 2 wherein the measured parameter is the base drive current.

Claim 5

Apparatus as defined in claim 2 wherein the measured parameter is the collector base voltage of the power transistor.

Claim 6

A circuit for independently controlling the base drive current I B and the collector-base voltage V CB in a power transistor having collector, base and emitter elements and a load in the collector-emitter circuit compising: input means for producing a first control signal corresponding to a maximum base current level and a second control signal corresponding to a preferred power transistor saturation level; at least a first base drive switch connected to the base element of the power transistor to supply forward base drive current thereto; a switching signal source connected to said switch to operate same at a desired rate; means for producing a first signal representing I B ; means for producing a second signal representing V CB ; first regulator means connected to receive the first control signal and the first signal for producing an output which is applied to regulate the switch to prevent the forward biasing base drive current from exceeding the maximum base current level; and second regulator means connected to receive the second control signal and the second signal for producing an output which is applied to control the switch to reduce the forward base drive whenever V CB goes below a level corresponding to the preferred power transistor saturation level.

Claim 7

A circuit for independently controlling the base drive current I B and the collector-base voltage V CB in a power transistor having collector, base and emitter elements and a load in the collector-emitter circuit compising: input means for producing a first control signal corresponding to a maximum base current level and a second control signal corresponding to a preferred power transistor saturation level; at least a first base drive switch connected to the base element of the power transistor to supply forward base drive current thereto; a switching signal source connected to said switch to operate same at a desired rate; means for producing a first signal representing I B ; means for producing a second signal representing V CB ; first regulator means connected to receive the first control signal and the first signal for producing an output which is applied to regulate the switch to prevent the forward biasing base drive current from exceeding the maximum base current level; and second regulator means connected to receive the second control signal and the second signal for producing an output which is applied to control the switch to reduce the forward base drive whenever V CB goes below a level corresponding to the preferred power transistor saturation level.

Claim 8

A circuit as defined in claim 5 further including a proportionally operating transistor connected to receive the output of the first and second regulator means to be controlled proportionally thereby, said transistor having an output connected to control the base drive switch.

Claim 9

A circuit as defined in claim 5 wherein the first regulator means comprises a current-sensing resistor connected in circuit with the switch, a differential amplifier having inputs connected to the opposite sides of said current-sensing transistor, and amplifier means connected to receive the output of the differential amplifier and the control signal and operative to produce a regulation signal output related to the difference therebetween.

Claim 10

A circuit as defined in claim 5 wherein the second regulator means comprises a differential amplifier having inputs connected to the base and collector elements of the power transistor to produce an output representing the voltage across the collector and base elements, and an amplifier connected to receive the output of the differential amplifier and the control signal and producing a regulated output signal corresponding to the difference therebetween.

Claim 11

A circuit as defined in claim 5 further including a second base drive switch having an output connected to the base element of the power transistor and an input connected for complemental operation with the first switch, the first switch being connected to control a positive potential source to turn the power transistor ON, and the second switch being connected to a negative potential source to turn the power transistor OFF.

Claim 12

Apparatus as defined in claim 1 wherein said source of timing signals includes a bistable device having a trigger input, a reset input and an output which changes with voltage transitions applied to the trigger input; and feedback means connecting the output circuit of the power transistor to the reset input to reset the bistable device to an initial condition in the event the power transistor comes out of saturation.

Claim 13

A timing circuit for applying turn ON signals to a controllable device such as a transistor and for maintaining said turn ON signals for a predetermined time comprising: first means responsive to an input signal transition of predetermined polarity to produce a trigger signal of predetermined duration; second means connected to the controllable device responsive to the trigger signal during a portion of the duration thereof to produce an output of predetermined character adapted to switch the controllable device from one condition to another condition; and feedback means from the controllable device to said second means for terminating the output of predetermined character in the event the controllable device does not switch within a predetermined period of time.

Claim 14

A timing circuit for applying turn ON signals to a controllable device such as a transistor and for maintaining said turn ON signals for a predetermined time comprising: first means responsive to an input signal transition of predetermined polarity to produce a trigger signal of predetermined duration; second means connected to the controllable device responsive to the trigger signal during a portion of the duration thereof to produce an output of predetermined character adapted to switch the controllable device from one condition to another condition; and feedback means from the controllable device to said second means for terminating the output of predetermined character in the event the controllable device does not switch within a predetermined period of time.

Claim 15

A bistable transistor control circuit comprising: a bistable device having a trigger input, a reset input and an output, the signal condition at said output reflecting the polarity of the last-applied voltage transition at said trigger input; a controlled transistor, having input and output circuits; means connected between the output of the bistable device and the input circuit of the transistor to turn the transistor off when the output is in a first signal condition and to turn the transistor on when the output is in a second signal condition; and feedback means connecting the output circuit of the transistor to the reset input to reset the bistable device to the first output signal condition when the transistor initiates a transition from off to on.

Claim 16

A bistable transistor control circuit comprising: a bistable device having a trigger input, a reset input and an output, the signal condition at said output reflecting the polarity of the last-applied voltage transition at said trigger input; a controlled transistor, having input and output circuits; means connected between the output of the bistable device and the input circuit of the transistor to turn the transistor off when the output is in a first signal condition and to turn the transistor on when the output is in a second signal condition; and feedback means connecting the output circuit of the transistor to the reset input to reset the bistable device to the first output signal condition when the transistor initiates a transition from off to on.

Claim 17

Apparatus as definec in claim 12 further including: a first reactive circuit having a first time constant connected in said feedback means; a second reactive circuit having a second time constant connected to said trigger input to maintain a predetermined input signal level for a predetermined time after a transition; said second time constant being longer than the first.

Claim 18

Apparatus as defined in claim 12 wherein said device is an NE 555 or equivalent.