US4797582A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Bidirectional interface circuit having a unipolar port and a bipolar port for logic signals
Assignee: Bendix Electronics SA
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Filing: 1987-05-13
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Granted: 1989-01-10
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Expires: 2007-05-13
Abstract
Abstract The invention relates to the transmission of logic signals. The circuit comprises a port D connected to a line for the transmission of unipolar logic signals and a port (D+, D-) connected to a pair of wires for the transmission of differential logic signals. Current generators (T4, T5) send a positive differential signal when a unipolar "low" logic signal is applied to port D. when the differential signal received at (D+, D-) must be transmitted on the D port by a "low" level, the signal representing the low level remains higher than the voltage level VL1 below which the voltage generators are activated, in order to prevent any blockage of the circuit by looping of the signals within the circuit. Application to the multiplexing of the flow of data processed in an automobile vehicle.
Inventors
- 👤 Van T. Nguyen
- 👤 Claude Chateignon
- 👤 Georges Deschamps
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 17:10
CPC Classifications
G; G06; G06F; G06F13/00; H; H04; H04L; H04L5/00; H04L5/14; H04L5/1423
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
177 words
Interface circuit for exchanging logic signals between an unipolar port connected to a wire for the transmission of unipolar serial signals and a differential port connected to a pair of wires for the transmission of differential serial signals, characterized in that it comprises: a first sub-circuit (C2,T1) for transmitting signals from the differential port to the unipolar port; said signals having a first and second logic state, said first logic state having a first level within a first range (V b -V L2 ); a second sub-circuit (C1, T2, T3, T4, T5) for transmitting signals from the unipolar port to the differential port; said signals having a second level within a second range (V L1 -0) for transmission on the differential line of a signal (+V d ) representative of said first logic state, said first and second ranges having no common part; and means responsive to the non-overlapping of said first and second ranges to prevent the looping of said signals representative of said first logic state through the interface circuit from blocking the interface circuit.
Claim 2
Dependent Claim
177 words
Interface circuit for exchanging logic signals between an unipolar port connected to a wire for the transmission of unipolar serial signals and a differential port connected to a pair of wires for the transmission of differential serial signals, characterized in that it comprises: a first sub-circuit (C2,T1) for transmitting signals from the differential port to the unipolar port; said signals having a first and second logic state, said first logic state having a first level within a first range (V b -V L2 ); a second sub-circuit (C1, T2, T3, T4, T5) for transmitting signals from the unipolar port to the differential port; said signals having a second level within a second range (V L1 -0) for transmission on the differential line of a signal (+V d ) representative of said first logic state, said first and second ranges having no common part; and means responsive to the non-overlapping of said first and second ranges to prevent the looping of said signals representative of said first logic state through the interface circuit from blocking the interface circuit.
Claim 3
Dependent Claim
44 words
Circuit according to claim 1, characterized in that it includes means of establishing on each port a priority of said first logic state over said second logic state, in the case of a conflict of signals, in both directions of flow of said signals.
Claim 4
Dependent Claim
21 words
Circuit according to claim 1, characterized in that said first and second sub-circuits being coupled at the point of said ports.
Claim 5
Dependent Claim
150 words
Circuit according to claim 1, characterized in that said second sub-circuit includes a threshold comparator (C1) having one input connected to a threshold voltage (V L1 ) and another input connected to the unipolar port in order to control, by means of a control transistor (T2) and a biasing transistor (T3), current generators (T4,T5), for supplying a current to the differential port, for creating a positive differential signal under the control of a low logic signal arriving at the unipolar port, said threshold voltage V L1 of said comparator (C1) corresponding to the limit potential that can be applied to the unipolar port in order to transmit on the differential port a positive signal, corresponding with a low logic level, an overshoot of said threshold voltage causing the blockage of said current generators and the transmission of a negative signal on the differential port, corresponding with a high logic level.
Claim 6
Dependent Claim
70 words
Circuit according to claim 1, characterized in that said first sub-circuit includes a comparator (C2) whose inputs are connected to the wires at the differential port and whose output controls the base of a transistor (T1) connected in open-collector configuration to the unipolar port and a bridge formed by an external resistor (R1) and a resistor (R2) fixing the voltage level of the low signal received by the unipolar port.
Claim 7
Dependent Claim
41 words
Circuit according to claim 1, characterized in that it includes a control input (E) for disconnecting the differential port, said control input connected to two field effect transistors (T6,T7) and operable for putting the differential port in the high impedance state.
Claim 8
Dependent Claim
32 words
Circuit according to claim 4, characterized in that it includes a diode (D 1 ) connected to one of said current generators (T4), for protecting the differential port from a positive overvoltage.
Claim 9
Dependent Claim
44 words
Circuit according to claim 4, characterized in that it includes means for adjusting the positive or negative voltage on the differential port, formed by an adjustable voltage source (+V BB ) and variable resistors (R12, R13) connected to said current generators (T4 and T5).
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-01-10 | 1992-07-11 | 1993-01-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-01-10 | 1996-07-11 | 1997-01-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-01-10 | 2000-07-11 | 2001-01-10 | $7700.00 | Window Closed / Lapsed |