US5123847A
Expired / Lapsed
US
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Method of manufacturing flat panel backplanes, display transistors
Assignee: LG Display Co Ltd
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Filing: 1990-01-16
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Granted: 1992-06-23
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Expires: 2010-01-16
Abstract
Abstract An improved method of manufacturing active matrix display backplanes with thin film transistors thereon and a drive scheme therefor. A refractory metal covers the indium tin oxide (ITO) layer, patterned to form a gate electrode for the transistors and to protect the pixel pad ITO during formation of the transistors. To reduce shorts and capacitance between the gate and the source or the drain, an intermetal dielectric is patterned to form a central portion over a planar portion of the gate region and to cover any exposed gate edges.
Inventors
- 👤 Scott H. Holmberg
- 👤 Richard A. Flasck
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 17:50
CPC Classifications
G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/1368; H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6732; H10D30/6737; H10D30/6739; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6746; H10D86/00; H10D86/40; H10D86/451; H10D86/60; G02F1/136259; G02F1/136268; G02F2202/00; G02F2202/10; G02F2202/103; Y; Y10; Y10S; Y10S148/00; Y10S148/105
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
60 words
A method of manufacturing matrix display backplanes comprising: providing a glass substrate with an insulator layer and a conductive oxide layer on said insulator layer; depositing a refractory metal layer on said conductive oxide layer prior to subsequent processing steps; and processing the substrate and layers to form matrix transistors with said refractory metal layer protecting said conductive oxide layer.
Claim 2
Independent Claim
60 words
A method of manufacturing matrix display backplanes comprising: providing a glass substrate with an insulator layer and a conductive oxide layer on said insulator layer; depositing a refractory metal layer on said conductive oxide layer prior to subsequent processing steps; and processing the substrate and layers to form matrix transistors with said refractory metal layer protecting said conductive oxide layer.
Claim 3
Dependent Claim
27 words
The method as claimed in claim 1, further including: removing portions of said refractory metal and said conductive oxide layers to form at least one gate electrode.
Claim 4
Dependent Claim
23 words
The method as claimed in claim 2, further including: depositing a gate insulator layer and a semiconductor layer successively onto said gate electrode.
Claim 5
Dependent Claim
19 words
The method as claimed in claim 3 wherein: depositing said semiconductor layer includes plasma depositing an amorphous silicon alloy.
Claim 6
Dependent Claim
38 words
The method as claimed in claim 3 further including: depositing an intermediate dielectric layer over said gate electrode, said gate insulator and said semiconductor layers; and removing a central portion of said dielectric layer from said semiconductor layer.
Claim 7
Dependent Claim
28 words
The method as claimed in claim 5 further including: depositing the source and drain electrodes over said semiconductor layer; and forming a passivating layer over said matrix transistors.
Claim 8
Dependent Claim
27 words
The method as claimed in claim 6 further including: removing the refractory metal layer from said oxide layer adjacent said matrix transistors to form pixel contact pads.
Claim 9
Dependent Claim
25 words
The method as claimed in claim 1 including: depositing said insulator layer on said substrate; and depositing said conductive oxide layer on said insulating layer.
Claim 10
Dependent Claim
50 words
The method as claimed in claim 2 further including: removing portions of said refractory metal and said conductive oxide layer to form a plurality of gate electrodes, gate contact pads, pixel pads and source contact pads with each of said gate electrodes coupled to one of said gate contact pads.
Claim 11
Dependent Claim
31 words
The method as claimed in claim 2 further including: depositing an intermetal dielectric layer over said gate electrode; and removing a central portion of said dielectric layer from said gate electrode.
Claim 12
Dependent Claim
22 words
The method as claimed in claim 10 further including: depositing a gate insulator and a semiconductor layer successively onto said gate electrode.
Claim 13
Dependent Claim
19 words
The method as claimed in claim 11 wherein: depositing said semiconductor layer includes plasma depositing an amorphous silicon alloy.
Claim 14
Dependent Claim
28 words
The method as claimed in claim 11 further including: depositing the source and drain electrodes over said semiconductor layer; and forming a passivating layer over said matrix transistors.
Claim 15
Dependent Claim
28 words
The method as claimed in claim 13 further including: removing the refractory metal layer from said conductive oxide layer adjacent said matrix transistors to form pixel contact pads.
Claim 16
Independent Claim
76 words
A method of manufacturing matrix display backplanes comprising: providing a substrate; depositing a gate electrode on said substrate having at least one exposed edge; depositing a gate insulator on said gate electrode; depositing a semiconductor material on said insulator; depositing an intermetal dielectric adjacent said edge of said gate electrode; and depositing a drain electrode onto at least a portion of said intermetal dielectric adjacent said edge of said gate electrode to form matrix transistor elements.
Claim 17
Independent Claim
76 words
A method of manufacturing matrix display backplanes comprising: providing a substrate; depositing a gate electrode on said substrate having at least one exposed edge; depositing a gate insulator on said gate electrode; depositing a semiconductor material on said insulator; depositing an intermetal dielectric adjacent said edge of said gate electrode; and depositing a drain electrode onto at least a portion of said intermetal dielectric adjacent said edge of said gate electrode to form matrix transistor elements.
Claim 18
Dependent Claim
78 words
The method as claimed in claim 15 including: depositing said gate insulator to substantially cover said gate electrode and depositing said semiconductor material to substantially cover said gate insulator; depositing said intermetal dielectric over said gate electrode, said insulator and said semiconductor material; removing a central portion of said intermetal dielectric to expose a substantially planar portion of said semiconductor material prior to depositing said drain electrode; and depositing a source electrode concurrently with said drain in electrode.
Claim 19
Dependent Claim
26 words
The method as claimed in claim 16 wherein: providing said substrate includes providing a glass substrate; and depositing a conductive oxide layer on said insulator layer.
Claim 20
Dependent Claim
40 words
The method as claimed in claim 17 wherein: depositing said gate electrode includes depositing a refractory metal layer on said conductive oxide layer; and removing portions of said refractory metal and said conductive oxide layer to form said gate electrode.
Claim 21
Dependent Claim
50 words
The method as claimed in claim 18 further including: removing portions of said refractory metal and said conductive oxide layer to form a plurality of gate electrodes, gate contact pads, pixel pads and source contact pads with each of said gate electrodes coupled to one of said gate contact pads.
Claim 22
Dependent Claim
36 words
The method as claimed in claim 18 including: depositing a passivating layer over said matrix transistor elements; and removing said refractory metal from said conductive layer adjacent said matrix transistor elements to form pixel contact pads.
Claim 23
Dependent Claim
19 words
The method as claimed in claim 15 wherein: depositing said semiconductor material includes plasma depositing an amorphous silicon alloy.
Claim 24
Dependent Claim
54 words
The method as claimed in claim 15 including: depositing said intermetal dielectric to cover said gate electrode; removing a central portion of said dielectric to expose a substantially planar portion of said gate electrode prior to depositing said insulator and said semiconductor material thereon; and depositing a source electrode concurrently with said drain electrode.
Claim 25
Dependent Claim
26 words
The method as claimed in claim 22 wherein: providing said substrate includes providing a glass substrate; and depositing a conductive oxide layer on said insulator layer.
Claim 26
Dependent Claim
40 words
The method as claimed in claim 23 wherein: depositing said gate electrode includes depositing a refractory metal layer on said conductive oxide layer; and removing portions of said refractory metal and said conductive oxide layer to form said gate electrode.
Claim 27
Dependent Claim
37 words
The method as claimed in claim 24 including: depositing a passivating layer over said matrix transistor elements; and removing said refractory metal from said conductive oxide layer adjacent said matrix transistor elements to form pixel contact pads.
Claim 28
Dependent Claim
18 words
The method as claimed in claim 25 wherein: depositing said semiconductor material includes plasma depositing amorphous silicon alloy.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-06-23 | 1995-12-23 | 1996-06-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-06-23 | 1999-12-23 | 2000-06-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-06-23 | 2003-12-23 | 2004-06-23 | $7700.00 | Window Closed / Lapsed |