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US4624737A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for producing thin-film transistor

Assignee: LG Display Co Ltd
•
Filing: 1985-06-10
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Granted: 1986-11-25
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Expires: 2005-06-10
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Abstract

Abstract A gate insulating film, a high-resistivity semiconductor film, a low-resistivity semiconductor film and if necessary a conducting film are successively deposited in lamination without exposing them to any oxidizing atmosphere including atmospheric air, and then the source and drain electrodes are selectively formed.

Inventors

  • 👤 Masafumi Shimbo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 08:35
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/01; H10D86/021; H10D86/0231; H10D30/00; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6732; H10D30/6737; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6746; H10D86/40; H10D86/60; H10D86/481

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 182 words
A process for producing a thin-film transistor comprising a first step for forming a gate electrode on an insulating substrate, a second step for continuously depositing on said gate electrode and substrate a gate insulating film, a high-resistivity semiconductor film and a conducting film containing at least a low-resistivity semiconductor film without exposing them to an oxidizing atmosphere, a third step in which said high-resistivity semiconductor film and said conducting film are selectively etched so that they are partly left as an island region on said gate electrode, a fourth step for selectively forming a source electrode and a drain electrode both contacting a part of the surface of said island region and spaced apart from each other, a fifth step for selectively removing said conducting film exposed on said island region with said source and drain electrodes serving as at least a part of the mask, a sixth step for depositing a surface passivation film, and a seventh step for selectively removing said surface passivation film and exposing a part of each of said source electrode, drain electrode and gate electrode.
Claim 2
Dependent Claim 182 words
A process for producing a thin-film transistor comprising a first step for forming a gate electrode on an insulating substrate, a second step for continuously depositing on said gate electrode and substrate a gate insulating film, a high-resistivity semiconductor film and a conducting film containing at least a low-resistivity semiconductor film without exposing them to an oxidizing atmosphere, a third step in which said high-resistivity semiconductor film and said conducting film are selectively etched so that they are partly left as an island region on said gate electrode, a fourth step for selectively forming a source electrode and a drain electrode both contacting a part of the surface of said island region and spaced apart from each other, a fifth step for selectively removing said conducting film exposed on said island region with said source and drain electrodes serving as at least a part of the mask, a sixth step for depositing a surface passivation film, and a seventh step for selectively removing said surface passivation film and exposing a part of each of said source electrode, drain electrode and gate electrode.
Claim 3
Dependent Claim 57 words
A process for producing a thin-film transistor according to claim 1, wherein in said second step said conducting film is composed of at least two layers consisting of a low-resistivity semiconductor film and thereon a refractory metal film or transparent conducting film, and both of said films are continuously deposited without being exposed to the oxidizing atmosphere.
Claim 4
Dependent Claim 30 words
A process for producing a thin-film transistor according to claim 1 , wherein in said sixth step a light-shielding film is formed at a part of said surface passivation film.
Claim 5
Dependent Claim 30 words
A process for producing a thin-film transistor according to claim 2 , wherein in said sixth step a light-shielding film is formed at a part of said surface passivation film.

References Cited (Backward Citations)

US4331758A Cited
US4426407A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-11-24 1990-05-26 1990-11-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-11-24 1994-05-26 1994-11-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-11-24 1998-05-26 1998-11-25 $7700.00 Window Closed / Lapsed

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