US5109348A
Expired / Lapsed
US
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High speed image processing computer
Assignee: BAE Systems National Security Solutions Inc
•
Filing: 1989-01-24
•
Granted: 1992-04-28
•
Expires: 2009-01-24
Abstract
Abstract Disclosed is an image processor having an image algorithm processor (66) operating under control of a writable control store (94), and a number of parallel image processors (72) operating under control of instruction words from a writable control store (100). An image memory controller (68) receives memory addresses from the image algorithm processor (66) for coordinating the reading and writing of an image memory (82) using pixel data processed by the parallel image processor set (72). The image memory controller (68) arbitrates memory address request cycles, memory refresh cycles and screen refresh cycles. The image memory (82) includes different planes (84, 86 and 88) associated with red, green and blue pixel data. Associated with each image memory plane is a video processor (106) for converting parallel image data to high speed serial image data. The pixel data output by the video processor (106) is further processed through look-up tables (108) to provide red, green and blue color signals for output to a video monitor (28). Overlay data is stored in an overlay memory plane (90), and is processed by an associated overlay data processor (80) and a video output overlay processor (116). The overlay processor is operable to generate page addresses to the color look-up tables responsive to image data in the overlay memory plane.
Inventors
- 👤 David M. Pfeiffer
- 👤 David T. Stoner
- 👤 John P. Norsworthy
- 👤 Dwight D. Dipert
- 👤 Jay A. Thompson
- 👤 James A. Fontaine
- 👤 Michael K. Corry
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 03:55
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/57; G06F5/00; G06F5/01; G06F5/015; G06F7/544; G06F7/5443; G06T; G06T1/00; G06T1/20; G06F2207/00; G06F2207/38; G06F2207/3804; G06F2207/3808; G06F2207/3828; G06F7/499; G06F7/49905; G06F7/4991; G06F7/49921; G06F7/49942; G06F7/49947
Claims Analysis
Total Claims: 44
Claim 1
Independent Claim
153 words
An image processing system, comprising: an image memory for storing pixel data representative of an image, said memory including a plurality of video DRAMs having a random access memory section associated with an input/output data port, and an address port, each said video DRAM having a serial shift register with a parallel input from said random access section, an a serial data output, the serial data output of each said serial shift register comprising a parallel output of said memory; a video output section including a serializer for serializing the parallel output of said image memory into a serial stream of pixels; a look-up table having multiple pages connected to said video output section for translating the serialized pixel data responsive to a selected page into video data for output from image processing system; and control circuitry operable to select one of said pages responsive to image data output from said image memory.
Claim 2
Dependent Claim
153 words
An image processing system, comprising: an image memory for storing pixel data representative of an image, said memory including a plurality of video DRAMs having a random access memory section associated with an input/output data port, and an address port, each said video DRAM having a serial shift register with a parallel input from said random access section, an a serial data output, the serial data output of each said serial shift register comprising a parallel output of said memory; a video output section including a serializer for serializing the parallel output of said image memory into a serial stream of pixels; a look-up table having multiple pages connected to said video output section for translating the serialized pixel data responsive to a selected page into video data for output from image processing system; and control circuitry operable to select one of said pages responsive to image data output from said image memory.
Claim 3
Dependent Claim
20 words
The image processing system of claim 1 wherein said control circuitry comprises an overlay processor coupled to said image memory.
Claim 4
Dependent Claim
50 words
The image processing system of claim 1 further including means responsive to signals generated by said image algorithm processor for issuing instructions to said image algorithm processor and to said parallel image processor for coordinating the operations thereof to access image data in said memory and process the image data.
Claim 5
Dependent Claim
40 words
The image processing system of claim 2, further including a plurality of image memory planes and a plurality of parallel image processors, each of said memory planes connected to a respective one of a plurality of said parallel image processors.
Claim 6
Dependent Claim
23 words
The image processing system of claim 4, further including a plurality of video output sections, each connected to one said image memory plane.
Claim 7
Dependent Claim
35 words
The image processing system of claim 2, further including flag processor means connected to said image algorithm processor and to said parallel image processor for processing flag information to provide coordinated operations of said system.
Claim 8
Dependent Claim
35 words
The image processing system of claim 2, further including an image data error detector monitoring image data transferred between said image memory and said parallel image processor and for preventing the processing of faulty data.
Claim 9
Dependent Claim
34 words
The image processing system of claim 2, further including mask processing means for generating write mask information related to pixel data which is desired to be prevented from being written into said image memory.
Claim 10
Dependent Claim
50 words
The image processing system of claim 2, wherein said image memory includes a storage area greater than a desired viewable area, and further including an image memory management unit for arranging portions of said memory so as to be located in a predefined memory area accessible for presentation for viewing.
Claim 11
Dependent Claim
45 words
The image processing system of claim 2, wherein said parallel image processor is operable to simultaneously access plural pixels of image data from said image memory, and said parallel image processor further includes plural data processing units for processing said plural pixels of image data.
Claim 12
Dependent Claim
109 words
The image processing system of claim 1 and further comprising: an image algorithm processor for generating memory addresses in accordance with an algorithm; an image memory controller connected to said image algorithm processor for receiving memory addresses, said image memory controller further including means for generating DRAM refresh addresses for use in refreshing said video DRAMs, and means for loading said serial shift register with pixel data from said random access section of said memory; an parallel image processor connected to said image memory for processing pixel data; means for controlling said image algorithm processor and said parallel image processor for coordinating the reading and writing of said memory.
Claim 13
Dependent Claim
20 words
The image processing system of claim 2 wherein said overlay processor is further operable to address an overlay look-up table.
Claim 14
Dependent Claim
20 words
The image processing system of claim 12 wherein said overlay look-up table is further addressed by said video output section.
Claim 15
Dependent Claim
21 words
The image processing system of claim 1 wherein said image memory includes a plurality of color planes and an overlay plane.
Claim 16
Dependent Claim
26 words
The image processing system of claim 1 wherein said video output section comprises a plurality of color processors responsive to image data from respective color planes.
Claim 17
Dependent Claim
25 words
The imaging processing system of claim 1 wherein said control circuitry is responsive to the addresses generated by one or more of the color processors.
Claim 18
Dependent Claim
44 words
An image processing system comprising: an image memory for storing image data; circuitry for generating an address responsive to the image data; a look-up memory having multiple pages for outputting color data responsive to the address; control circuitry for selecting one of said pages.
Claim 19
Dependent Claim
44 words
An image processing system comprising: an image memory for storing image data; circuitry for generating an address responsive to the image data; a look-up memory having multiple pages for outputting color data responsive to the address; control circuitry for selecting one of said pages.
Claim 20
Dependent Claim
39 words
The image processing system of claim 17 wherein each page of said look-up memory contains color data having a predetermined range of intensity, such that the contrast of the output color data may be affected by said control circuitry.
Claim 21
Dependent Claim
28 words
The image processing system of claim 17 wherein said look-up memory comprises a plurality of look-up tables having multiple pages, each table associated with a respective color plane.
Claim 22
Dependent Claim
18 words
The image processing system of claim 19 wherein said look-up memory comprises red, blue and green look-up tables.
Claim 23
Dependent Claim
23 words
The image processing system of claim 17 wherein said control circuitry comprises an overlay plane which selects the page of the look-up memory.
Claim 24
Dependent Claim
18 words
The image processing system of claim 21 wherein said overlay plane comprises a portion of said image memory.
Claim 25
Independent Claim
59 words
A method of processing image data comprising the steps of: storing image data in an image memory; retrieving image data from said image memory; generating an address from said retrieved image data; selecting one of a plurality of pages from a look-up memory; and accessing color data from said look-up memory responsive to said address and said page selection.
Claim 26
Independent Claim
59 words
A method of processing image data comprising the steps of: storing image data in an image memory; retrieving image data from said image memory; generating an address from said retrieved image data; selecting one of a plurality of pages from a look-up memory; and accessing color data from said look-up memory responsive to said address and said page selection.
Claim 27
Dependent Claim
33 words
The method of claim 23 and further comprising the step of storing color data in said look-up memory such that each page comprises a set of color data having a predetermined color range.
Claim 28
Dependent Claim
33 words
The method of claim 23 wherein said accessing step comprises the step of accessing color data from a plurality of look-up tables having multiple pages, each table associated with a respective color plane.
Claim 29
Dependent Claim
25 words
The method of claim 23 wherein said selecting step comprises the step of selecting a page responsive to data stored in an overlay memory plane.
Claim 30
Dependent Claim
19 words
The method of claim 23 and further comprising the step of modifying the data stored in said look-up memory.
Claim 31
Dependent Claim
24 words
The method of claim 27 wherein said modifying step comprises the step of modifying the data stored in said look-up memory during blanking periods.
Claim 32
Dependent Claim
105 words
An image processing system comprising: an image memory for storing image data; video processor coupled to said image memory to generate an address responsive to image data output from said image memory; an overlay processor coupled to said image memory to generate an address responsive to image data output from said image memory; video look-up circuitry coupled to said video processor for generating a video signal responsive to said address from said video processor; and overlay look-up circuitry coupled to said video processor for generating an overlay signal responsive to the address generated by said video processor and the address generated by said overlay processor.
Claim 33
Dependent Claim
105 words
An image processing system comprising: an image memory for storing image data; video processor coupled to said image memory to generate an address responsive to image data output from said image memory; an overlay processor coupled to said image memory to generate an address responsive to image data output from said image memory; video look-up circuitry coupled to said video processor for generating a video signal responsive to said address from said video processor; and overlay look-up circuitry coupled to said video processor for generating an overlay signal responsive to the address generated by said video processor and the address generated by said overlay processor.
Claim 34
Dependent Claim
40 words
The image processing system of claim 29 wherein said overlay look-up circuitry generates said overlay signal responsive to a predetermined number of address bits from said overlay processor-generated address and a predetermined number of bits from said video processor-generated address.
Claim 35
Dependent Claim
39 words
The image processing system of claim 29 wherein said video look-up circuitry generates said video signal responsive to a predetermined number of bits from said video processor-generated address and a predetermined number of bits from said overlay processor-generated address.
Claim 36
Dependent Claim
30 words
The image processing system of claim 29 wherein said look-up tables generate digital video signals and further comprising a digital-to-analog converter to convert said digital signals to an analog signal.
Claim 37
Dependent Claim
36 words
The image processing system of claim 29 and further comprising logic look-up circuitry and operable to selectively enable one of said video signal or said overlay signal responsive to the address generated by said overlay processor.
Claim 38
Dependent Claim
23 words
The image processor system of claim 33 wherein said logic look-up circuitry is further responsive to the address generated by said video circuitry.
Claim 39
Dependent Claim
21 words
The image processing system of claim 29 wherein said image memory includes a plurality of color planes and an overlay plane.
Claim 40
Dependent Claim
25 words
The image processing system of claim 35 wherein said video processor comprises a plurality of color processors responsive to image data from respective color planes.
Claim 41
Dependent Claim
26 words
The image processing system of claim 36 wherein said overlay look-up circuitry is responsive to the address generated by one or more of the color processors.
Claim 42
Dependent Claim
36 words
The image processing system of claim 37 wherein said video processor comprises red, blue and green color processors and wherein said overlay look-up circuitry is responsive to addresses generated by said blue and red color processors.
Claim 43
Dependent Claim
24 words
The image processing system of claim 36 wherein said video look-up circuitry comprises a plurality of color look-up circuits responsive to respective color processors.
Claim 44
Dependent Claim
24 words
The image processing system of claim 39 wherein said overlay look-up comprises a plurality of overlay look-up circuits associated with respective color look-up circuits.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-04-28 | 1995-10-28 | 1996-04-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-04-28 | 1999-10-28 | 2000-04-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-04-28 | 2003-10-28 | 2004-04-28 | $7700.00 | Window Closed / Lapsed |