Multiple execute instruction apparatus

Claim 1

A data processing system including a memory containing a plurality of instruction words at least one type of which contains an address or part of an address of another instruction word to be processed wherein said one type of instruction word (EXE) is adapted to control the execution of a number of instructions, said number (N) indicated by said one type of instruction word and said one type of instruction word (EXE) containing the address of the first instruction of said number (N) of instructions comprising: an instruction counter (KS); means (G3-G7) to set said instruction counter (KS) to a state corresponding to said number (N) when said at least one type of instruction word (EXE) indicating said number (N) is being processed, said means (G3-G7) decrementing said instruction counter each time an instruction is being executed; a register (E); a program counter (P) for storing the address of an instruction being executed; means (G1200-G1215) for temporarily storing the contents of said program counter (P) in said register (E) when said one type of instruction (EXE) is being executed; means (G1400-G1415) for transferring the contents of said register (E) back to said program counter (P) when the last instruction of said number (N) is being executed; a bistable device (BEXT) to indicate that said one type of instruction (EXE) and said sequence of instructions are being executed; and means (G1, G2, G7) for setting said bistate device (BEXT) to the 1-condition during the execution of said one type of instruction (E).