US5104482A — Simultaneous glass deposition and viscoelastic fl…

Claim 1

Independent Claim 151 words

An integrated dual step viscoelastic process for forming a borophosphosilicate glass (BPSG) layer on a wafer substrate (wafer), comprising the steps of: adjusting the reaction temperature in a chemical vapor deposition (CVD) reaction chamber to be compatible with a flow temperature of said BPSG layer, said flow temperature being within a range of 750° C.-950° C.; placing said wafer in said CVD reaction chamber; introducing vaporized reactants comprised of an organic silicon source, an organic phosphorous source, and an organic boron source into said CVD reaction chamber, wherein said silicon source is a liquid at room temperature; adjusting the flow velocity of said vaporized reactants to maintain a high velocity laminar flow of said reactants to said wafer for achieving a low particle, uniform layer; and forming said BPSG layer at a flow temperature such that thermal flow of said BPSG layer is accomplished simultaneously with deposition of said BPSG layer.

Claim 2

Dependent Claim 151 words

An integrated dual step viscoelastic process for forming a borophosphosilicate glass (BPSG) layer on a wafer substrate (wafer), comprising the steps of: adjusting the reaction temperature in a chemical vapor deposition (CVD) reaction chamber to be compatible with a flow temperature of said BPSG layer, said flow temperature being within a range of 750° C.-950° C.; placing said wafer in said CVD reaction chamber; introducing vaporized reactants comprised of an organic silicon source, an organic phosphorous source, and an organic boron source into said CVD reaction chamber, wherein said silicon source is a liquid at room temperature; adjusting the flow velocity of said vaporized reactants to maintain a high velocity laminar flow of said reactants to said wafer for achieving a low particle, uniform layer; and forming said BPSG layer at a flow temperature such that thermal flow of said BPSG layer is accomplished simultaneously with deposition of said BPSG layer.

Claim 3

Dependent Claim 138 words

An integrated dual-step chemical vapor deposition (IDSCVD) process for forming a borophosphosilicate glass (BPSG) layer on a generally planar patterned wafer substrate (wafer) comprising the steps of: placing said wafer in a reduced pressure chemical vapor deposition (CVD) reaction chamber; heating said wafer to a reaction temperature, said reaction temperature being within a range of 750° C.-950° C.; introducing vaporized reactants comprised of tetraethylorthosilicate (TEOS) as a silicon source, a phosphorus source, and a boron source into said CVD reaction; adjusting the flow of velocity of said vaporized reactants to maintain a high velocity laminar flow of said reactants to said wafer for achieving a low particle, uniform BPSG layer; simultaneously introducing with said vaporized reactants, a gaseous oxidant into said reaction chamber; and forming a simultaneously deposited and flowed low particle, uniform BPSG layer on said wafer.

Claim 4

Dependent Claim 138 words

An integrated dual-step chemical vapor deposition (IDSCVD) process for forming a borophosphosilicate glass (BPSG) layer on a generally planar patterned wafer substrate (wafer) comprising the steps of: placing said wafer in a reduced pressure chemical vapor deposition (CVD) reaction chamber; heating said wafer to a reaction temperature, said reaction temperature being within a range of 750° C.-950° C.; introducing vaporized reactants comprised of tetraethylorthosilicate (TEOS) as a silicon source, a phosphorus source, and a boron source into said CVD reaction; adjusting the flow of velocity of said vaporized reactants to maintain a high velocity laminar flow of said reactants to said wafer for achieving a low particle, uniform BPSG layer; simultaneously introducing with said vaporized reactants, a gaseous oxidant into said reaction chamber; and forming a simultaneously deposited and flowed low particle, uniform BPSG layer on said wafer.

Claim 5

Dependent Claim 14 words

The IDSCVD process as recited in claim 2, wherein said gaseous oxidant is oxygen.

Claim 6

Dependent Claim 22 words

The IDSCVD process as recited in claim 3, wherein said laminar flow is adjusted to approximately 100 to 2000 sccm per wafer.

Claim 7

Dependent Claim 15 words

The IDSCVD process as recited in claim 2, wherein said phosphorous source is thriethylphosphate (TEPO).

Claim 8

Dependent Claim 15 words

The IDSCVD process as recited in claim 2, wherein said boron source is triethylborate (TEB).

Claim 9

Dependent Claim 20 words

The IDSCVD process as recited in claim 2, wherein said reaction temperature is within a range of 800° C.-950° C.

Claim 10

Dependent Claim 162 words

A chemical vapor deposition (CVD) process for forming a borophosphosilicate glass (BPSG) layer on a generally planar wafer substrate (wafer) comprising the steps of: heating said wafer to a predetermined reaction temperature, said reaction temperature being within a range of 750° C. to 950° C.; placing said wafer in a reduced pressure CVD reaction chamber; first depositing a dielectric layer onto said wafer to a predetermined thickness wherein said thickness substantially covers surface patterns on said wafer without closing any of said pattern; introducing vaporized reactants selected from a group consisting of tetraethylorthosilicate as a silicon source, a phosphorus source and a boron source into said reaction chamber; adjusting the flow velocity of said vaporized reactants to maintain a high velocity laminar flow of said reactants to said wafer for achieving a low particle, uniform BPSG layer; simultaneously introducing with said vaporized reactants, a gaseous oxidant into said reaction chamber; and forming a simultaneously deposited and flowed glass layer on said wafer.

Claim 11

Dependent Claim 162 words

A chemical vapor deposition (CVD) process for forming a borophosphosilicate glass (BPSG) layer on a generally planar wafer substrate (wafer) comprising the steps of: heating said wafer to a predetermined reaction temperature, said reaction temperature being within a range of 750° C. to 950° C.; placing said wafer in a reduced pressure CVD reaction chamber; first depositing a dielectric layer onto said wafer to a predetermined thickness wherein said thickness substantially covers surface patterns on said wafer without closing any of said pattern; introducing vaporized reactants selected from a group consisting of tetraethylorthosilicate as a silicon source, a phosphorus source and a boron source into said reaction chamber; adjusting the flow velocity of said vaporized reactants to maintain a high velocity laminar flow of said reactants to said wafer for achieving a low particle, uniform BPSG layer; simultaneously introducing with said vaporized reactants, a gaseous oxidant into said reaction chamber; and forming a simultaneously deposited and flowed glass layer on said wafer.

Claim 12

Dependent Claim 18 words

The CVD process as recited in claim 8, wherein said gaseous oxidant is oxygen, oxide or nitrous oxide.

Claim 13

Dependent Claim 26 words

The CVD process as recited in claim 8, wherein said step of introducing a gaseous oxidant includes introducing an inert diluent gas with said gaseous oxidant.

Claim 14

Dependent Claim 17 words

The CVD process as recited in claim 10 wherein said inert diluent gas is argon or nitrogen.

Claim 15

Dependent Claim 28 words

The CVD process as recited in claim 8, wherein said dielectric layer is selected from a group of insulator materials consisting of undoped silicon oxide and silicon nitride.

Claim 16

Dependent Claim 19 words

The CVD process as recited in claim 8, wherein said simultaneously deposited and flowed BPSG layer is non-selectively etched.

Claim 17

Dependent Claim 19 words

The CVD process as recited in claim 13, wherein said non-selective etch is accomplished by a reactive ion etch.

Claim 18

Dependent Claim 20 words

The CVD process as recited in claim 8, wherein said reaction temperature is within a range of 800° C.-950° C.

Claim 19

Dependent Claim 150 words

An integrated dual-step chemical vapor deposition (IDSCVD) process for forming a borophosphosilicate glass (BPSG) layer on a generally planar patterned wafer substrate (wafer) comprising the steps of: placing said wafer in a reduced pressure chemical vapor deposition (CVD) reaction chamber; heating said wafer to a reaction temperature within a range of 750° C. to 950° C.; introducing vaporized reactants comprised of tetraethylorthosilicate (TEOS) as a silicon source, a phosphorus source, and a boron source into said CVD reaction chamber; adjusting the flow velocity of said vaporized reactants to maintain a high velocity laminar flow of said reactants to said wafer to maximize a heterogeneous, surface-controlled reaction and to minimize a homogeneous, particle generating process to achieve a low particle, uniform layer; simultaneously with introducing said vaporized reactants, introducing a gaseous oxidant into said reaction chamber; and forming a simultaneously deposited and flowed low particle, uniform BPSG layer on said wafer.

Claim 20

Dependent Claim 150 words

An integrated dual-step chemical vapor deposition (IDSCVD) process for forming a borophosphosilicate glass (BPSG) layer on a generally planar patterned wafer substrate (wafer) comprising the steps of: placing said wafer in a reduced pressure chemical vapor deposition (CVD) reaction chamber; heating said wafer to a reaction temperature within a range of 750° C. to 950° C.; introducing vaporized reactants comprised of tetraethylorthosilicate (TEOS) as a silicon source, a phosphorus source, and a boron source into said CVD reaction chamber; adjusting the flow velocity of said vaporized reactants to maintain a high velocity laminar flow of said reactants to said wafer to maximize a heterogeneous, surface-controlled reaction and to minimize a homogeneous, particle generating process to achieve a low particle, uniform layer; simultaneously with introducing said vaporized reactants, introducing a gaseous oxidant into said reaction chamber; and forming a simultaneously deposited and flowed low particle, uniform BPSG layer on said wafer.

Claim 21

Dependent Claim 13 words

The IDSCVD as recited in claim 16, wherein said gaseous oxidant is oxygen.

Claim 22

Dependent Claim 21 words

The IDSCVD as recited in claim 16 wherein said high velocity laminar flow is approximately 100 to 2000 sccm per wafer.

Claim 23

Dependent Claim 25 words

The IDSCVD as recited in claim 16 wherein said step of introducing a gaseous oxidant includes introducing an inert diluent gas with said gaseous oxidant.

Claim 24

Dependent Claim 14 words

The IDSCVD as recited in claim 19 wherein said inert diluent gas is argon.

Claim 25

Dependent Claim 23 words

The integrated dual step viscoelastic process as recited in claim 16, wherein said reaction temperature is within a range of 800° C.-950° C.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1995-04-14	1995-10-14	1996-04-14	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1999-04-14	1999-10-14	2000-04-14	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2003-04-14	2003-10-14	2004-04-14	$7700.00	Window Closed / Lapsed

Simultaneous glass deposition and viscoelastic flow process

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