Combining continuous time and discrete time signal processing in a delta-sigma modulator

Claim 2

A plurality of serially coupled filter sections in an analog-to-digital modulator characterized in that at least one of said filter sections is a continuous time filter section and at least another of said filter sections is a discrete time analog filter section.

Claim 3

The plurality of filter sections set forth in claim 1 wherein each of said plurality of filter sections includes an integrator.

Claim 4

A plurality of serially coupled filter sections in an analog-to-digital modulator as set forth in claim 1 wherein said analog-to-digital modulator further includes a summing circuit and an A/D converter, the output of said summing circuit being coupled to the input of said plurality of said serially coupled filter sections, and the output of said serially coupled filter sections being coupled to the input of said A/D converter.

Claim 5

An analog-to-digital modulator including a summing circuit coupled to an analog loop filter which in turn is coupled to a quantizer, the output of which is coupled to a D/A converter, the output of which is coupled to one input of said summing circuit, the other input being an analog input signal, wherein said analog loop filter comprises a plurality of filter sections, at least one of said filter sections is a continuous time filter section and at least another of said filter sections is a discrete time filter section.

Claim 6

An analog-to-digital modulator including a summing circuit coupled to an analog loop filter which in turn is coupled to a quantizer, the output of which is coupled to a D/A converter, the output of which is coupled to one input of said summing circuit, the other input being an analog input signal, wherein said analog loop filter comprises a plurality of filter sections, at least one of said filter sections is a continuous time filter section and at least another of said filter sections is a discrete time filter section.

Claim 7

The analog-to-digital modulator set forth in claim 4 wherein the first stage of said analog loop filter comprises a continuous time integrator and the remaining stages of said analog loop filter contain discrete time integrators.

Claim 8

The analog-to-digital modulator set forth in claim 5 wherein said analog loop filter is a fourth order filter.

Claim 9

The analog-to-digital modulator set forth in claim 3 wherein the stability of the analog loop filter is determined substantially by the characteristics of said filter section of said analog loop filter having discrete time integrators.

Claim 10

An analog loop filter in a delta-sigma modulator comprising a plurality of serially coupled integrator stages in which at least one of said integrator stages includes a continuous time integrator and at least another of said integrator stages includes a discrete time integrator.

Claim 11

An analog loop filter in a delta-sigma modulator comprising a plurality of serially coupled integrator stages in which at least one of said integrator stages includes a continuous time integrator and at least another of said integrator stages includes a discrete time integrator.

Claim 12

The analog loop filter of claim 8 wherein said first stage includes a continuous time integrator and the rest of the stages of said analog loop filters include discrete time integrators.

Claim 13

An analog-to-digital modulator comprising: a) an input terminal for receiving an analog input voltage; b) an input resistor coupled to said input terminal and to a summing node; c) a current resistor coupled between said summing node and a voltage reference to form a current source path to said summing node; d) a continuous time integrator having its input coupled to said summing node; e) a plurality of discrete time integrator stages connected in series, said plurality having an input coupled to the output of said continuous time integrator and including at least one feedback path within said plurality of discrete time integrators; f) a plurality of feedforward elements each coupled to different nodes within said plurality of discrete time integrator stages; and g) a one bit analog-to-digital converter for receiving the outputs of said plurality of feedforward elements and for providing a digital output of the analog-to-digital modulator, said analog-to-digital converter output also being used to switch a current sink path coupled to said summing node, said current switch being responsive to the digital state of the output of said analog-to-digital modulator.

Claim 14

An analog-to-digital modulator comprising: a) an input terminal for receiving an analog input voltage; b) an input resistor coupled to said input terminal and to a summing node; c) a current resistor coupled between said summing node and a voltage reference to form a current source path to said summing node; d) a continuous time integrator having its input coupled to said summing node; e) a plurality of discrete time integrator stages connected in series, said plurality having an input coupled to the output of said continuous time integrator and including at least one feedback path within said plurality of discrete time integrators; f) a plurality of feedforward elements each coupled to different nodes within said plurality of discrete time integrator stages; and g) a one bit analog-to-digital converter for receiving the outputs of said plurality of feedforward elements and for providing a digital output of the analog-to-digital modulator, said analog-to-digital converter output also being used to switch a current sink path coupled to said summing node, said current switch being responsive to the digital state of the output of said analog-to-digital modulator.

Claim 15

The analog-to-digital modulator set forth in claim 9 wherein said plurality of discrete time integrators includes series switched capacitors and wherein said feedback elements and said feedforward elements comprise switched capacitors.

Claim 16

The analog-to-digital modulator set forth in claim 9 wherein said continuous time integrator comprises a chopped operational amplifier and the chopping frequency applied to said operational amplifier is equal to the sampling frequency applied to said plurality of discrete time integrators.

Claim 17

An analog loop filter comprising a plurality of intercoupled integrator stages in which at least one of said integrator stages includes a continuous time integrator and at least another of said integrator stages includes a discrete time integrator.

Claim 18

An analog loop filter comprising a plurality of intercoupled integrator stages in which at least one of said integrator stages includes a continuous time integrator and at least another of said integrator stages includes a discrete time integrator.

Claim 19

An analog loop filter comprising a plurality of integrator stages coupled in a predetermined manner in which at least one of said integrator stages includes a continuous time integrator and at least another of said integrator stages includes a discrete time integrator.

Claim 20

An analog loop filter comprising a plurality of integrator stages coupled in a predetermined manner in which at least one of said integrator stages includes a continuous time integrator and at least another of said integrator stages includes a discrete time integrator.