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US5075242A
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Method of manufacturing CMOS semiconductor device having decreased diffusion layer capacitance
Assignee: Toshiba Corp
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Filing: 1989-12-14
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Granted: 1991-12-24
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Expires: 2009-12-14
Abstract
Abstract A method of manufacturing a CMOS semiconductor device includes the step of preparing a substrate having a first region of a second conductivity type serving as prospective source and drain formation regions of a transistor of a first conductivity type, and a second region of the first conductivity type serving as a prospective channel formation region of a transistor of the second conductivity type. The method of manufacturing the device further includes the steps of simultaneously doping an impurity of the first conductivity type having a first concentration in a first depth of each of the first and second regions, and doping an impurity of the first conductivity type having a concentration higher than the first concentration in a second depth smaller than the first depth of the first region.
Inventors
- 👤 Moriya Nakahara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 02:02
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0167; H10P; H10P30/00; H10P30/20; H10P30/21; H10D84/017; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10P30/202; H10P30/204
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
119 words
A method of manufacturing a CMOS semiconductor device, comprising the steps of: preparing a substrate having a first region of a second conductivity type serving as prospective source and drain formation regions of a transistor of a first conductivity type, and a second region of the first conductivity type serving as a prospective channel formation region of a transistor of the second conductivity type; simultaneously doping an impurity of the first conductivity type having a first concentration in a first depth of each of said first and second regions; and doping an impurity of the first conductivity type having a concentration higher than the first concentration in a second depth smaller than the first depth of said first region.
Claim 2
Independent Claim
119 words
A method of manufacturing a CMOS semiconductor device, comprising the steps of: preparing a substrate having a first region of a second conductivity type serving as prospective source and drain formation regions of a transistor of a first conductivity type, and a second region of the first conductivity type serving as a prospective channel formation region of a transistor of the second conductivity type; simultaneously doping an impurity of the first conductivity type having a first concentration in a first depth of each of said first and second regions; and doping an impurity of the first conductivity type having a concentration higher than the first concentration in a second depth smaller than the first depth of said first region.
Claim 3
Dependent Claim
20 words
A method according to claim 1, wherein the first depth is about 0.25 μm from a portion near a surface.
Claim 4
Dependent Claim
20 words
A method according to claim 1, wherein the second depth is about 0.1 μm from a portion near the surface.
Claim 5
Dependent Claim
48 words
A method according to claim 1, wherein the step of doping the impurity of the first conductivity type having the first concentration includes the step of ion-implanting boron in the second depth at a accelerated energy of 40 keV and a dose of 3×10 12 ions/cm 2 .
Claim 6
Dependent Claim
48 words
A method according to claim 1, wherein the step of doping the impurity of the first conductivity type having the higher concentration includes the step of ion-implanting boron in the first depth at an accelerated energy of 80 keV and a dose of 2×10 12 ions/cm 2 .
Claim 7
Dependent Claim
48 words
A method according to claim 1, wherein the step of doping the impurity of the first conductivity type having the higher concentration includes the step of ion-implanting phosphorus in the first depth at an accelerated energy of 240 keV and a dose of 6×10 12 ions/cm 2 .
Claim 8
Independent Claim
220 words
A method of manufacturing a CMOS semiconductor device, comprising the steps of: preparing a substrate having a first region of a second conductivity type serving as prospective source and drain formation regions of a transistor of a first conductivity type, a second region of the second conductivity type serving as a prospective channel formation region of the transistor of the first conductivity type, a third region of the first conductivity type serving as prospective source and drain formation regions of a transistor of the second conductivity type, and a fourth region of the first conductivity type serving as a prospective channel formation region of the transistor of the second conductivity type; simultaneously doping an impurity of the first conductivity type having a first concentration in a first depth of each of said first and fourth regions; doping an impurity of the first conductivity type having a concentration higher than the first concentration in a second depth smaller than the first depth of said first region; simultaneously doping an impurity of the second conductivity type having a second concentration in a third depth of each of said second and third regions; and doping an impurity of the second conductivity type having a concentration higher than the second concentration in a fourth depth smaller than the third depth of said third region.
Claim 9
Independent Claim
220 words
A method of manufacturing a CMOS semiconductor device, comprising the steps of: preparing a substrate having a first region of a second conductivity type serving as prospective source and drain formation regions of a transistor of a first conductivity type, a second region of the second conductivity type serving as a prospective channel formation region of the transistor of the first conductivity type, a third region of the first conductivity type serving as prospective source and drain formation regions of a transistor of the second conductivity type, and a fourth region of the first conductivity type serving as a prospective channel formation region of the transistor of the second conductivity type; simultaneously doping an impurity of the first conductivity type having a first concentration in a first depth of each of said first and fourth regions; doping an impurity of the first conductivity type having a concentration higher than the first concentration in a second depth smaller than the first depth of said first region; simultaneously doping an impurity of the second conductivity type having a second concentration in a third depth of each of said second and third regions; and doping an impurity of the second conductivity type having a concentration higher than the second concentration in a fourth depth smaller than the third depth of said third region.
Claim 10
Dependent Claim
20 words
A method according to claim 7, wherein the first depth is about 0.25 μm from a portion near a surface.
Claim 11
Dependent Claim
20 words
A method according to claim 7, wherein the second depth is about 0.1 μm from a portion near the surface.
Claim 12
Dependent Claim
44 words
A method according to claim 7, wherein the step of doping the impurity of the first conductivity type having the first concentration includes the step of ion-implanting boron at an accelerated energy of 40 keV and a dose of 3×10 12 ions/cm 2 .
Claim 13
Dependent Claim
44 words
A method according to claim 7, wherein the step of doping the impurity of the first conductivity type having the higher concentration includes the step of ion-implanting boron at an accelerated energy of 80 keV and a dose of 2×10 12 ions/cm 2 .
Claim 14
Dependent Claim
43 words
A method according to claim 7, wherein the step of doping the impurity of the first conductivity type having the higher concentration includes the step of ion-implanting phosphorus at an accelerated voltage of 240 keV a dose of 6×10 12 ions/cm 2 .
Claim 15
Independent Claim
154 words
A method of manufacturing a CMOS semiconductor device, comprising the steps of: preparing a substrate having a first region of a second conductivity type serving as prospective source and drain formation regions of a transistor of a first conductivity type, a second region of the second conductivity type serving as a prospective channel formation region of the transistor of the first conductivity type, and a third region of the first conductivity type serving as a prospective channel formation region of the transistor of the second conductivity type; simultaneously doping an impurity of the first conductivity type having a first concentration in a first depth of each of said first region spaced apart from said second region by a predetermined distance and said third region; and doping an impurity of the first conductivity type having a concentration higher than the first concentration in a second depth smaller than the first depth of said first region.
Claim 16
Independent Claim
154 words
A method of manufacturing a CMOS semiconductor device, comprising the steps of: preparing a substrate having a first region of a second conductivity type serving as prospective source and drain formation regions of a transistor of a first conductivity type, a second region of the second conductivity type serving as a prospective channel formation region of the transistor of the first conductivity type, and a third region of the first conductivity type serving as a prospective channel formation region of the transistor of the second conductivity type; simultaneously doping an impurity of the first conductivity type having a first concentration in a first depth of each of said first region spaced apart from said second region by a predetermined distance and said third region; and doping an impurity of the first conductivity type having a concentration higher than the first concentration in a second depth smaller than the first depth of said first region.
Claim 17
Dependent Claim
20 words
A method according to claim 13, wherein the predetermined distance falls within the range of about 0.5 to 1.5 μm.
Claim 18
Dependent Claim
24 words
A method according to claim 13, wherein the predetermined distance is substantially equal to the depths of said prospective source and drain formation regions.
References Cited (Backward Citations)
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| 7.5 Years (Year 8) | 1998-12-23 | 1999-06-24 | 1999-12-24 | $3760.00 | Window Closed / Lapsed |
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