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US5060050A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: Hitachi Ltd
•
Filing: 1990-08-31
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Granted: 1991-10-22
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Expires: 2010-08-31
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Abstract

Abstract In a semiconductor integrated circuit device having copper wiring, the copper wiring is covered with impurity diffusion-preventing films each of which is made of a silicon oxide film formed by plasma CVD, a silicon nitride film, an alumina film, or a titanium nitride film, whereby the resistance of the copper wiring can be prevented from increasing.

Inventors

  • 👤 Masatoshi Tsuneoka
  • 👤 Mitsuaki Horiuchi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 21:56
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4403; H10W20/4421; H10W20/4451; H10W72/00; H10W72/50; H10W72/531; H10W72/536; H10W72/551; H10W72/552; H10W72/5525; H10W72/59; H10W72/90; H10W72/951; H10W72/952; H10W72/981; H10W72/983

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 110 words
A semiconductor integrated circuit device comprising: a first layer, comprising polycrystalline silicon and having impurity contained therein, on a semiconductor substrate; a second layer on said first layer; and a third layer consisting essentially of copper on said second layer, whereby said second layer is between the first and third layers, wherein said second layer is made of a material that prevents said impurity from diffusing from said first layer to said third layer so as to prevent said impurity from diffusing into said third layer, whereby increase in resistivity of the third layer consisting essentially of copper, due to diffusion of the impurity into the third layer, is prevented.
Claim 2
Dependent Claim 110 words
A semiconductor integrated circuit device comprising: a first layer, comprising polycrystalline silicon and having impurity contained therein, on a semiconductor substrate; a second layer on said first layer; and a third layer consisting essentially of copper on said second layer, whereby said second layer is between the first and third layers, wherein said second layer is made of a material that prevents said impurity from diffusing from said first layer to said third layer so as to prevent said impurity from diffusing into said third layer, whereby increase in resistivity of the third layer consisting essentially of copper, due to diffusion of the impurity into the third layer, is prevented.
Claim 3
Dependent Claim 20 words
A semiconductor integrated circuit device according to claim 1, wherein the thickness of the second layer is at least 100Å.
Claim 4
Dependent Claim 22 words
A semiconductor integrated circuit device according to claim 1, wherein said impurity is selected from the group consisting of phosphorus and arsenic.
Claim 5
Dependent Claim 18 words
A semiconductor integrated circuit device according to claim 3, wherein said second layer is a titanium nitride film.
Claim 6
Dependent Claim 33 words
A semiconductor integrated circuit device according to claim 1, wherein said insulating layer is selected from the group consisting of a phosphosilicate glass film, a borosilicate glass film and a borophosphosilicate glass film.
Claim 7
Dependent Claim 22 words
A semiconductor integrated circuit device according to claim 5, wherein said impurity is selected from the group consisting of phosphorus and boron.
Claim 8
Dependent Claim 32 words
A semiconductor integrated circuit device according to claim 6, wherein said second layer is selected from the group consisting of a silicon oxide film, a silicon nitride film and an alumina film.
Claim 9
Dependent Claim 69 words
A semiconductor integrated circuit device according to claim 1, further comprising a fourth layer, on said third layer; and a fifth layer, having impurity contained therein, on the fourth layer such that the fourth layer is between the fifth layer and third layer, the fourth layer being made of a material that prevents diffusion of the impurity in the fifth layer from the fifth layer into the third layer.
Claim 10
Dependent Claim 19 words
A semiconductor integrated circuit device according to claim 8, wherein the second and fourth layers sandwich the third layer.
Claim 11
Dependent Claim 18 words
A semiconductor integrated circuit device according to claim 1, wherein said second layer does not contain said impurity.
Claim 12
Dependent Claim 26 words
A semiconductor integrated circuit device according to claim 1, wherein said impurity is at least one selected from the group consisting of As, P and B.
Claim 13
Dependent Claim 109 words
A semiconductor integrated circuit device comprising: a first wiring layer consisting essentially of copper over a semiconductor substrate; an insulating layer with impurities formed on said first wiring layer, the insulating layer having through holes; a second wiring layer consisting essentially of copper on said insulating layer and connected to said first wiring at said through holes; a third layer between said first wiring and said insulating layer; and a fourth layer between said insulating layer and said second wiring layer, wherein said third and fourth layers are each made of material that prevents said impurities from diffusing from said insulating layer to said first and second wiring layers.
Claim 14
Dependent Claim 109 words
A semiconductor integrated circuit device comprising: a first wiring layer consisting essentially of copper over a semiconductor substrate; an insulating layer with impurities formed on said first wiring layer, the insulating layer having through holes; a second wiring layer consisting essentially of copper on said insulating layer and connected to said first wiring at said through holes; a third layer between said first wiring and said insulating layer; and a fourth layer between said insulating layer and said second wiring layer, wherein said third and fourth layers are each made of material that prevents said impurities from diffusing from said insulating layer to said first and second wiring layers.
Claim 15
Dependent Claim 22 words
A semiconductor integrated circuit device according to claim 12, wherein the thickness of said third and fourth layers is at least 100Å.
Claim 16
Dependent Claim 19 words
A semiconductor integrated circuit device according to claim 12, wherein said third and fourth layers are titanium nitride layers.
Claim 17
Dependent Claim 31 words
A semiconductor integrated circuit device according to claim 12, wherein said insulating layer is selected from the group of a phosphosilicate glass film, a borosilicate glass film and borophosphosilicate glass film.
Claim 18
Dependent Claim 22 words
A semiconductor integrated circuit device according to claim 15, wherein said impurities are selected from the group consisting of phosphorus and boron.
Claim 19
Dependent Claim 32 words
A semiconductor integrated circuit device according to claim 12, wherein said insulating layer is selected from the group consisting of a silicon oxide film, a silicon nitride film and an alumina film.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-10-21 1995-04-22 1995-10-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-10-21 1999-04-22 1999-10-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-10-21 2003-04-22 2003-10-22 $7700.00 Window Closed / Lapsed

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