US5049968A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dielectrically isolated substrate and semiconductor device using the same
Assignee: Toshiba Corp
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Filing: 1990-02-28
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Granted: 1991-09-17
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Expires: 2010-02-28
Abstract
Abstract A dielectrically isolated substrate comprises a first semiconductor wafer, a second semiconductor wafer bonded on the first semiconductor wafer with a first insulating layer interposed therebetween, a semiconductor layer formed on the second semiconductor wafer, a first groove formed in the semiconductor layer and the second semiconductor wafer so as to reach the first insulating layer, thereby isolating the semiconductor layer and the second semiconductor wafer and a second insulating layer formed on the side face of the first groove or embedded in the first groove. In this dielectrically isolated substrate, a high breakdown voltage element and a low breakdown voltage element are formed in a region isolated by the first groove.
Inventors
- 👤 Akio Nakagawa
- 👤 Kazuyoshi Furukawa
- 👤 Tsuneo Ogura
- 👤 Katsujiro Tanzawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 15:22
CPC Classifications
H; H10; H10D; H10D12/00; H10D12/411; H10D12/421; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D86/00; H10D86/201; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/019; H10W10/031; H10W10/041; H10W10/061; H10W10/10; H10W10/181; H10W10/30; H10W10/40; H10P90/1914; H10W10/014; H10W10/17
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
94 words
A dielectric isolation substrate comprising: a first semiconductor wafer; a second semiconductor wafer bonded on said first semiconductor wafer with a first insulating layer interposed therebetween; an epitaxial semiconductor layer formed on the second semiconductor wafer and having a conductivity type opposite to the conductivity type of the second semiconductor wafer; a first groove formed in said semiconductor layer and said second semiconductor wafer so as to reach said insulating layer, thereby forming isolated regions of the semiconductor layer and the second semiconductor wafer; and a second insulating layer formed in the first groove.
Claim 2
Dependent Claim
94 words
A dielectric isolation substrate comprising: a first semiconductor wafer; a second semiconductor wafer bonded on said first semiconductor wafer with a first insulating layer interposed therebetween; an epitaxial semiconductor layer formed on the second semiconductor wafer and having a conductivity type opposite to the conductivity type of the second semiconductor wafer; a first groove formed in said semiconductor layer and said second semiconductor wafer so as to reach said insulating layer, thereby forming isolated regions of the semiconductor layer and the second semiconductor wafer; and a second insulating layer formed in the first groove.
Claim 3
Dependent Claim
73 words
The substrate according to claim 1, wherein a semiconductor region, having the same conductivity type as the second semiconductor wafer and having an impurity concentration higher than that of the second semiconductor wafer, is formed in a portion of said regions of the semiconductor layer and the second semiconductor wafer isolated by the first insulating layer and the second insulating layer and adjacent to the first insulating layer and the second insulating layer.
Claim 4
Dependent Claim
20 words
The substrate according to claim 1, wherein said semiconductor layer has the same conductivity type as the second semiconductor wafer.
Claim 5
Dependent Claim
33 words
The substrate according to claim 1, wherein said second insulating layer is an oxide film formed on the side face of the first groove, and polycrystalline silicon is filled in the first groove.
Claim 6
Dependent Claim
20 words
The substrate according to claim 1, wherein said second insulating layer is formed of resin filled in the first groove.
Claim 7
Dependent Claim
44 words
The substrate according to claim 1, further comprising a second groove formed in said semiconductor layer and forming isolated portions of said semiconductor layer, and a third insulating layer formed on the side face of the second groove or filled in the second groove.
Claim 8
Dependent Claim
33 words
The substrate according to claim 6, wherein said third insulating layer is an oxide film formed on the side face of the second groove, and polycrystalline silicon is filled in the second groove.
Claim 9
Dependent Claim
20 words
The substrate according to claim 6, wherein said third insulating layer is formed of resin filled in the second groove.
Claim 10
Dependent Claim
46 words
The substrate according to claim 1, wherein said second insulating layer is an oxide film formed on the side face of the first groove, polycrystalline silicon is filled in the first groove, and said third insulating layer is formed of resin filled in the second groove.
Claim 11
Dependent Claim
110 words
A semiconductor device comprising: a first semiconductor wafer; a second semiconductor wafer bonded on said first semiconductor wafer with a first insulating layer interposed therebetween; an epitaxial semiconductor layer formed on the second semiconductor wafer and having a conductivity type opposite to the conductivity type of the second semiconductor wafer; a groove formed in said semiconductor layer and said second semiconductor wafer so as to reach said insulating layer, thereby forming isolated regions of the semiconductor layer and the second semiconductor; a second insulating layer formed in the groove; a high breakdown voltage element formed in said semiconductor layer; and a low breakdown voltage element formed in said semiconductor layer.
Claim 12
Dependent Claim
110 words
A semiconductor device comprising: a first semiconductor wafer; a second semiconductor wafer bonded on said first semiconductor wafer with a first insulating layer interposed therebetween; an epitaxial semiconductor layer formed on the second semiconductor wafer and having a conductivity type opposite to the conductivity type of the second semiconductor wafer; a groove formed in said semiconductor layer and said second semiconductor wafer so as to reach said insulating layer, thereby forming isolated regions of the semiconductor layer and the second semiconductor; a second insulating layer formed in the groove; a high breakdown voltage element formed in said semiconductor layer; and a low breakdown voltage element formed in said semiconductor layer.
Claim 13
Dependent Claim
29 words
The semiconductor device according to claim 10, wherein said high breakdown voltage element and said low breakdown voltage element are isolated from each other by said second insulating layer.
Claim 14
Dependent Claim
25 words
The semiconductor device according to claim 10, wherein said low breakdown voltage element is isolated from the second semiconductor wafer by means of a pn-junction.
Claim 15
Dependent Claim
61 words
The semiconductor device according to claim 10, wherein a high breakdown voltage element and a plurality of low breakdown voltage elements are formed in said semiconductor layer, the high breakdown voltage element is isolated from the low breakdown voltage elements by said second insulating layer, and the low breakdown voltage elements are isolated from each other by means of a pn-junction.
Claim 16
Dependent Claim
101 words
The semiconductor device according to claim 10, further comprising a second groove formed in the semiconductor layer and isolating the semiconductor layer into a plurality of regions, and a third insulating layer formed on the side face of the second groove or filled in the second groove, wherein a high breakdown voltage element and a plurality of low breakdown voltage elements are formed in said semiconductor layer, the high breakdown voltage element is isolated from the low breakdown voltage elements by said second insulating layer, and the low breakdown voltage elements are isolated from each other by the third insulating layer.
Claim 17
Dependent Claim
147 words
A semiconductor device comprising: a first semiconductor wafer; a second semiconductor wafer bonded on said first semiconductor wafer with a first insulating layer interposed therebetween; a semiconductor layer formed on the second semiconductor wafer; a groove formed in said semiconductor layer and said second semiconductor wafer so as to reach said insulating layer, thereby forming isolated regions of the semiconductor layer and the second semiconductor wafer; a second insulating layer formed on the side face of the groove or embedded in the groove; a high breakdown voltage element formed in said semiconductor layer; and a low breakdown voltage element formed in said semiconductor layer, said high breakdown voltage element and said low breakdown voltage element being formed in the same region of the semiconductor layer isolated by said second insulating layer, and said high and low breakdown voltage elements being isolated from each other by a pn-junction.
Claim 18
Dependent Claim
147 words
A semiconductor device comprising: a first semiconductor wafer; a second semiconductor wafer bonded on said first semiconductor wafer with a first insulating layer interposed therebetween; a semiconductor layer formed on the second semiconductor wafer; a groove formed in said semiconductor layer and said second semiconductor wafer so as to reach said insulating layer, thereby forming isolated regions of the semiconductor layer and the second semiconductor wafer; a second insulating layer formed on the side face of the groove or embedded in the groove; a high breakdown voltage element formed in said semiconductor layer; and a low breakdown voltage element formed in said semiconductor layer, said high breakdown voltage element and said low breakdown voltage element being formed in the same region of the semiconductor layer isolated by said second insulating layer, and said high and low breakdown voltage elements being isolated from each other by a pn-junction.
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