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US5039602A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of screening A.C. performance characteristics during D.C. parametric test operation

Assignee: National Semiconductor Corp
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Filing: 1990-03-19
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Granted: 1991-08-13
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Expires: 2010-03-19
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Abstract

Abstract A method of characterizing A.C. performance of an integrated circuit based upon D.C. measurements utilizing a process monitor circuit. The process monitor circuit provides a D.C. output having a magnitude which varies with the frequency of an oscillator section of the monitor circuit. The frequency is a function of both A.C. and D.C. performance, therefore the process monitor output signal is indicative of such performance. Since D.C. measurements may be made while the integrated circuits are in wafer form utilizing a conventional wafer prober and parametric tester, it is possible to detect A.C. performance problems very early in the manufacturing process.

Inventors

  • 👤 Richard B. Merrill
  • 👤 Edson D. Gomersall
  • 👤 Enayet U. Issaq

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 13:54
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/316

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 117 words
A method of implementing a process for manufacturing integrated circuits comprising the following steps: (1) developing specifications for the process to be implemented which characterize both A.C. and D.C. parameters associated with the process to be implemented; (2) fabricating a multiplicity of integrated circuit devices and at least one process monitor circuit different from the integrated circuit devices in a wafer of semiconductor material utilizing the process to be implemented; (3) generating an output signal which has an amplitude which varies with said A.C. and D.C. parameters utilizing the process monitor circuit; (4) measuring said A.C. and D.C. parameters by detecting the amplitude of the output signal; and (5) comparing said measured parameters with said developed specifications.
Claim 2
Independent Claim 117 words
A method of implementing a process for manufacturing integrated circuits comprising the following steps: (1) developing specifications for the process to be implemented which characterize both A.C. and D.C. parameters associated with the process to be implemented; (2) fabricating a multiplicity of integrated circuit devices and at least one process monitor circuit different from the integrated circuit devices in a wafer of semiconductor material utilizing the process to be implemented; (3) generating an output signal which has an amplitude which varies with said A.C. and D.C. parameters utilizing the process monitor circuit; (4) measuring said A.C. and D.C. parameters by detecting the amplitude of the output signal; and (5) comparing said measured parameters with said developed specifications.
Claim 3
Dependent Claim 28 words
The method of claim 1 further comprising the step of modifying the process to be implemented in the event said measured parameters do not meet said developed specifications.
Claim 4
Dependent Claim 25 words
The method of claim 2 wherein said step of measuring A.C. and D.C. parameters is carried out by making D.C. measurements utilizing a parametric tester.
Claim 5
Dependent Claim 30 words
The method of claim 3 wherein said process monitor circuit includes an oscillator section which produces an oscillator signal having a frequency which is a function of said A.C. parameters.
Claim 6
Dependent Claim 36 words
The method of claim 4 wherein said step of generating the output signal includes the step of converting said oscillator signal to a voltage having an amplitude which is a function of said oscillator signal frequency.
Claim 7
Dependent Claim 22 words
The method of claim 5 wherein said step of converting is carried out using a reference capacitor external to said semiconductor wafer.
Claim 8
Dependent Claim 27 words
The method of claim 6 wherein said step of converting is further carried out utilizing a current source in said parametric tester for charging said reference capacitor.
Claim 9
Dependent Claim 28 words
The method of claim 7 wherein said process monitor circuit includes switching means for charging said reference capacitor utilizing said current source and for discharging said reference capacitor.
Claim 10
Dependent Claim 36 words
The method of claim 8 wherein said switching means is responsive to said oscillator signal and said switching means causes said reference capacitor to charge for a period which is a function of said oscillator signal.
Claim 11
Dependent Claim 29 words
The method of claim 9 wherein said voltage which is a function of said oscillator signal is developed across said reference capacitor at the end of said charge period.
Claim 12
Dependent Claim 24 words
The method of claim 10 wherein said process monitor circuit includes a frequency divider circuit which couples said oscillator signal to said switching means.
Claim 13
Independent Claim 170 words
A method of manufacturing integrated circuits comprising the following steps, (1) fabricating a multiplicity of integrated circuit devices and at least one process monitor circuit means in a wafer of semiconductor material, said process monitor circuit means being a means for providing an output signal having a frequency indicative of the A.C. performance of said multiplicity of integrated circuit devices; (2) converting said output signal to a converted signal on the wafer having an amplitude which corresponds to the frequency of the monitor output signal; (3) measuring said converted signal amplitude and comparing the result to a predetermined specification; (4) rejecting one or more of said plurality of integrated circuit devices in the event said monitor output signal does not meet said predetermined specifications; (5) breaking the wafer of semiconductor material so as to form individual die made up of said integrated circuit devices; (6) packaging said individual die containing said integrated circuit devices which have not been rejected; and (7) performing further electrical tests on said packaged individual die.
Claim 14
Independent Claim 170 words
A method of manufacturing integrated circuits comprising the following steps, (1) fabricating a multiplicity of integrated circuit devices and at least one process monitor circuit means in a wafer of semiconductor material, said process monitor circuit means being a means for providing an output signal having a frequency indicative of the A.C. performance of said multiplicity of integrated circuit devices; (2) converting said output signal to a converted signal on the wafer having an amplitude which corresponds to the frequency of the monitor output signal; (3) measuring said converted signal amplitude and comparing the result to a predetermined specification; (4) rejecting one or more of said plurality of integrated circuit devices in the event said monitor output signal does not meet said predetermined specifications; (5) breaking the wafer of semiconductor material so as to form individual die made up of said integrated circuit devices; (6) packaging said individual die containing said integrated circuit devices which have not been rejected; and (7) performing further electrical tests on said packaged individual die.
Claim 15
Dependent Claim 17 words
The method of claim 12 wherein said step of measuring is carried out utilizing D.C. measuring apparatus.
Claim 16
Dependent Claim 30 words
The method of claim 13 wherein said process monitor circuit means includes an oscillator which produces the output signal having a frequency which is a function of said A.C. performance.
Claim 17
Dependent Claim 77 words
The method of claim 14 wherein said process monitor means includes means for receiving an external reference capacitor, means for receiving the output of an external current source and switching means for charging said external reference capacitor with current from the external current source for a charge period which is a function of the frequency of the oscillator signal so as to produce said converted signal across the reference capacitor at the end of said charge period.
Claim 18
Independent Claim 151 words
A method of manufacturing integrated circuits comprising the following steps; (1) fabricating a multiplicity of integrated circuit devices and at least one process monitor circuit means in a wafer of semiconductor material in accordance with a predetermined fabrication process, said process monitor circuit means being a means for providing an output signal having a frequency indicative of the A.C. performance of said multiplicity of integrated circuit devices; (2) converting said output signal to an amplitude signal on the wafer having an amplitude indicative of the frequency of the monitor output signal; (3) measuring said converted signal and comparing said converted signal to a predetermined specification; (4) altering said predetermined fabrication process in the event the comparison to said specification is not favorable; (5) fabricating additional integrated circuit devices, subsequent to the preceding step of altering, utilizing said predetermined fabrication process; and (6) repeating the previous fabricating step a multiplicity of times.
Claim 19
Independent Claim 151 words
A method of manufacturing integrated circuits comprising the following steps; (1) fabricating a multiplicity of integrated circuit devices and at least one process monitor circuit means in a wafer of semiconductor material in accordance with a predetermined fabrication process, said process monitor circuit means being a means for providing an output signal having a frequency indicative of the A.C. performance of said multiplicity of integrated circuit devices; (2) converting said output signal to an amplitude signal on the wafer having an amplitude indicative of the frequency of the monitor output signal; (3) measuring said converted signal and comparing said converted signal to a predetermined specification; (4) altering said predetermined fabrication process in the event the comparison to said specification is not favorable; (5) fabricating additional integrated circuit devices, subsequent to the preceding step of altering, utilizing said predetermined fabrication process; and (6) repeating the previous fabricating step a multiplicity of times.
Claim 20
Dependent Claim 30 words
The method of claim 16 wherein said integrated circuit devices fabricated in step (1) and the integrated circuit devices fabricated in step (b 4) are the same type of device.

References Cited (Backward Citations)

US4045736A Cited
US3781670A Cited
US3922707A Cited
JPS6065542A Cited
US4606025A Cited
JPS60119748A Cited
JPS6130044A Cited
US4801875A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-08-12 1995-02-11 1995-08-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-08-12 1999-02-11 1999-08-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-08-12 2003-02-11 2003-08-13 $7700.00 Window Closed / Lapsed

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