US5032535A
Expired / Lapsed
US
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Method of manufacturing semiconductor device
Assignee: Toshiba Corp
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Filing: 1989-04-21
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Granted: 1991-07-16
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Expires: 2009-04-21
Abstract
Abstract In the selective etching by RIE, a poly-Si film formed on the gate oxide film is not entirely removed such that the poly-Si film is partly left unremoved. Then, the entire surface is covered with a poly-Si film, followed by applying RIE. The particular technique permits preventing the gate oxide film near a poly-Si gate and the interface between the gate oxide film and the substrate from being damaged. Finally, a chemical dry etching, which does not do damage to the gate insulation film near the poly-Si gate, is applied to remove the poly-Si film.
Inventors
- 👤 Hiroyuki Kamijo
- 👤 Toshiro Usami
- 👤 Yuuichi Mikata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 17:40
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10P; H10P50/00; H10P50/20; H10P50/26; H10P50/264; H10P50/266; H10P50/267; H10P50/268
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
236 words
A method of manufacturing a semiconductor device including a MOSFET of an LDD structure, comprising the steps of: (a) forming a gate insulation film on a semiconductor substrate; (b) forming a first film on the gate insulation film, said first film constituting a part of a gate electrode; (c) forming a film including at least a second film, said second film being formed on the first film, differing from said first film in etching properties, and constituting a part of the gate electrode; (d) forming an insulation film on the film including the second film; (e) forming an insulation film pattern by selectively removing said insulation film; (f) selectively removing the film including the second film by an anisotropic etching using the insulation film pattern as a mask; (g) forming a fourth film to cover the first film as well as the upper and side surfaces of the insulation film pattern; (h) applying an anisotropic etching to selectively remove the fourth film and the first film to allow the fourth film to remain on the insulation film pattern and on the side surfaces of the film including the second film and to allow the first film to remain below the remains fourth film; (i) forming a diffusion region; (j) removing the residual fourth film and the first film below the fourth film by isotropic etching; and (k) forming a diffusion region of a low impurity concentration.
Claim 2
Independent Claim
236 words
A method of manufacturing a semiconductor device including a MOSFET of an LDD structure, comprising the steps of: (a) forming a gate insulation film on a semiconductor substrate; (b) forming a first film on the gate insulation film, said first film constituting a part of a gate electrode; (c) forming a film including at least a second film, said second film being formed on the first film, differing from said first film in etching properties, and constituting a part of the gate electrode; (d) forming an insulation film on the film including the second film; (e) forming an insulation film pattern by selectively removing said insulation film; (f) selectively removing the film including the second film by an anisotropic etching using the insulation film pattern as a mask; (g) forming a fourth film to cover the first film as well as the upper and side surfaces of the insulation film pattern; (h) applying an anisotropic etching to selectively remove the fourth film and the first film to allow the fourth film to remain on the insulation film pattern and on the side surfaces of the film including the second film and to allow the first film to remain below the remains fourth film; (i) forming a diffusion region; (j) removing the residual fourth film and the first film below the fourth film by isotropic etching; and (k) forming a diffusion region of a low impurity concentration.
Claim 3
Dependent Claim
103 words
The method of manufacturing a semiconductor device according to claim 1, wherein the step (c) for forming a film including at least a second film includes the step of forming said second film on the first film and the step of forming a third film having an electrical conductivity on the second film, said third film differing in etching properties from the second film, and the first film has a thickness of 500 to 1,500 Å, the second film has a thickness of 10 to 100 Å, and the total thickness of the first, second and third films is 3,000 to 4,500 Å.
Claim 4
Dependent Claim
72 words
The method of manufacturing a semiconductor device according to claim 1, wherein the step of forming the diffusion region is performed after step (h) for forming the fourth film using the residual fourth film after step (g) as a mask, and the step of forming a diffusion region of a low impurity concentration is performed after step (j) of removing the fourth film and the first film positioned below the fourth film.
Claim 5
Dependent Claim
73 words
The method of manufacturing a semiconductor device according to claim 1, wherein the steps (i) and (k) for forming the diffusion region and the diffusion region of a low impurity concentration comprise the step of implanting a low concentration of phosphorus ions after step (f) for selectively removing the film including the second film and the step of implanting a high concentration of As ions after step (g) for forming a fourth film.
Claim 6
Dependent Claim
78 words
The method of manufacturing a semiconductor device according to claim 1, wherein the steps (i) and (k) for forming the diffusion region and the diffusion region of a low impurity concentration comprise the step of implanting a high concentration of As ions after step (g) for forming a fourth film and the step of implanting a low concentration of phosphorus ions after step (f) for removing the fourth film and the first film positioned below the fourth film.
Claim 7
Dependent Claim
30 words
The method of manufacturing a semiconductor device according to claim 1, wherein the anisotropic etching is a reactive ion etching (RIE) and the isotropic etching is a chemical dry etching.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1994-07-15 | 1995-01-14 | 1995-07-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-07-15 | 1999-01-14 | 1999-07-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-07-15 | 2003-01-14 | 2003-07-16 | $7700.00 | Window Closed / Lapsed |