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JPS647564A Expired / Lapsed JP ⏱️ 0.0 years remaining

Formation of gate electrode of mos transistor

Assignee: Toshiba Corp
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Filing: 1987-06-30
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Granted: —
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Expires: 2007-06-30
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Abstract

Abstract PURPOSE:To protect a substrate agaist damage by a method wherein a second polycrystalline silicon doped with impurity is deposited on a first polycrystalline silicon two times as thick as the first polycrystalline silicon, and a gate electrode is subjected to etching so as to leave the first polycrystalline unremoved. CONSTITUTION:A non-doped polycrystalline silicon 3 low in etching rate for a reactive-ion etching is deposited as thick as 1000Angstrom before a doped polycrystalline silicon 4 is deposited. Next, the polycrystalline silicon 4 is so etched as to leave the non-doped polycrystalline silicon 3 unremoved. Then disused impurity left is removed as an insulator by oxidizing the non-doped polycrystalline silicon 3. Further, the polycrystalline silicon 4 is made to be two times or more as thick as the polycrystalline silicon 3. As mentioned above, the etching of the polycrystalline is stopped halway, wherefore a gate oxide 2 and a substrate 1 are protected against damage, and as the disused polycrystalline is turned into an insulator through thermal oxidation, a gate electrode is prevented from defective insulation.

Inventors

  • 👤 Yukihiro Ushiku

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-28 23:06
CPC Classifications
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