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US5015886A
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Programmable sequential-code recognition circuit
Assignee: Samsung Electronics Co Ltd
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Filing: 1989-05-24
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Granted: 1991-05-14
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Expires: 2009-05-24
Abstract
Abstract There is disclosed a programmable sequential code recognition circuit comprising an individual code recognition circuit for recognizing each input code, and a sequence recognition circuit for recognizing the sequency given for individual codes obtained by combination of input signals, so that a specific mode may be selected by the input combination sequentially inputted.
Inventors
- 👤 Jung-Dal Choi
- 👤 Hyung-Kyu Yim
- 👤 Jae-Young Do
- 👤 Jin-Ki Kim
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 15:24
CPC Classifications
H; H03; H03M; H03M7/00; G; G06; G06F; G06F11/00; G06F11/28; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/31701; G06F7/00; G06F7/02
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
105 words
In a semiconductor device having a plurality of operating modes, a programmable sequential code recognition circuit comprising individual code recognition means, having a combination of a plurality of logic elements, for receiving a plurality of sequential input codes to thereafter provide an individual code according to recognition of said input codes, and sequence recognition means, coupled to the output of said individual code recognition means, for outputting a signal to enable or disable a particular operating mode upon the semiconductor device, in response to logic combination of said each individual code input, whereby a desired particular operating mode may be selected in the semiconductor device.
Claim 2
Dependent Claim
105 words
In a semiconductor device having a plurality of operating modes, a programmable sequential code recognition circuit comprising individual code recognition means, having a combination of a plurality of logic elements, for receiving a plurality of sequential input codes to thereafter provide an individual code according to recognition of said input codes, and sequence recognition means, coupled to the output of said individual code recognition means, for outputting a signal to enable or disable a particular operating mode upon the semiconductor device, in response to logic combination of said each individual code input, whereby a desired particular operating mode may be selected in the semiconductor device.
Claim 3
Dependent Claim
65 words
A programmable sequential code recognition circuit as claimed in claim 1, wherein said sequence recognition means comprises a plurality of shift registors sequentially connected with each other, whose number equals to that of the individual codes in said individual code recognition means, the input of said shift registors being controlled by the outut of said individual code recognition means corresponding to a preceding stage output.
Claim 4
Dependent Claim
27 words
A programmable sequential code recognition circuit as claimed in claim 2, wherein said individual code recognition means is comprised of logic elements of a programmable logic array.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-05-13 | 1994-11-12 | 1995-05-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-05-13 | 1998-11-12 | 1999-05-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-05-13 | 2002-11-12 | 2003-05-14 | $7700.00 | Window Closed / Lapsed |